492 Eda Tools Jobs - Page 20

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Design Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will engage in a dynamic work environment where you will analyze, design, code, and test various components of application code across multiple clients. Your day will involve collaborating with team members to ensure the successful implementation...

Seeking an experienced Account Manager (ESG) with 7–12 years in enterprise/Govt./Defence sales. Must have strong EDA/CAE tools knowledge, manage key accounts, lead negotiations, drive sales cycles, and build senior-level client relationships. Required Candidate profile BE/B.Tech in Electronics/Mechanical with 7–12 years in Govt./Defence/Enterprise sales, expertise in EDA & CAE tools, strong negotiation, tender management, and senior-level relationship skills.

We are hiring Sales Engineers to drive EDA/MCAD/CAE software sales across defense, commercial, and academic sectors. Responsible for demand creation, client engagement, solution demos, tenders, and closing deals across Hyderabad, Pune, and Delhi. Required Candidate profile BE/B.Tech graduate with 2–4 years of sales experience in engineering software (EDA/MCAD/CAE).Strong in client engagement, tenders,presentations,procurement processes,and willing to travel extensively.

Job Title: Senior EDA Engineer - Cadence Virtuoso, SKILL/CDF, Tool Integration Role Overview: We are seeking a highly skilled EDA Engineer with solid experience in Cadence Virtuoso environments and a deep understanding of OpenAccess databases, SKILL scripting, foundry PDK/CDK integration, and schematic/layout tool automation. This role will collaborate closely with AI/EDA development teams to build seamless design flows and robust automation for our AI-powered analog design platform. Key Responsibilities: Develop, maintain, and optimize analog/mixed-signal IC design flows in Cadence Virtuoso and related EDA tools. Create, modify, and optimize SKILL scripts for automation of layout, schematic...

Looking for Platform/Board Design Engineers with the following requirements and this is an immediate requirement. Extensive experience in hardware board design. Strong foundation and expertise in analyzing digital, Analog and power electronic circuits. Proficient with AMD FPGAs, CPLD and MPSOC architecture-based board designs. Knowledgeable in signal integrity, EMI/EMC concepts for digital and power electronics. Completed at least one project from high-level design to final product level validation. Capable of independently handling schematic Capturing, design analysis DC Drop, Singal Integrity, and coordinating reviews with peer of layout, mechanical, SI, and EMC teams. Experienced in board...

Responsibilities Understand the standards/specifications Architecture development and documenting implementation level details Hands on work for every aspect of verification cycle Responsible for the compliance with the latest Methodologies. Developing Verification IPs Define Functional Coverage matrix and Comprehensive Test plan Regression management and functional coverage closure DUT integration and verification for IP delivery sign-off Leading small team Person Specification Required Skills Hands-on experience of complete verification cycle with strong verification concepts Strong knowledge of Verilog, SystemVerilog and UVM Experience in UVM based Verification IP development Experience i...

We are seeking an experienced System on Chip (SoC) Architect to join our development team. The ideal candidate will be involved in designing, integrating, and optimizing SoC hardware architectures and ensuring seamless software-hardware co-development. You have: Bachelors Degree in Electrical Engineering, Computer Engineering, or a related field (Masters or Ph.D. preferred). Overall,15+ years of experience as a Chip design expert. 8+ years of proven experience in IC design, SoC architecture, or a similar role. Proficiency in hardware description languages: Verilog, VHDL, and System Verilog Expertise in EDA tools for IC design and verification: Mentor Graphics, Cadence, or Synopsys Strong und...

Job Description: We are looking for an experienced Physical Design Engineer with strong expertise in EMIR analysis and end-to-end RTL to GDSII flow. The ideal candidate should have hands-on experience in physical design, power integrity, and timing closure at advanced process nodes. Key Responsibilities: Handle complete RTL to GDSII implementation Perform EMIR (Electro migration and IR drop) analysis and closure Conduct timing analysis , power planning , and floor planning Run and debug DRC , LVS , and STA reports Work on advanced technology nodes (e.g., 7nm, 5nm ) Collaborate with cross-functional teams (FE, DFT, verification, etc.) Automate flows using Python , TCL , or Perl Required Skill...

Job Description: We are seeking an experienced Physical Design Engineer with strong expertise in VCLP (Voltage-Controlled Low Power) techniques and full flow RTL to GDSII implementation. Key Responsibilities: End-to-end ownership of physical design flow from RTL to GDSII VCLP implementation and optimization (highly important) Block-level and full-chip physical design Perform timing analysis , DRC/LVS checks , and power optimization Collaborate with front-end, verification, and DFT teams for successful tape-out Must-Have Skills: Strong hands-on experience in VCLP RTL to GDSII implementation EDA tools (Cadence Innovus, Synopsys ICC2, PrimeTime, Mentor Calibre) Scripting languages: Python, TCL,...

: To work independently on block/IP levels analog layout design from schematic. Estimating the Area, Optimizing Floorplan, Routing and Verifications. Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 5,7,10, 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence Virtuoso Editor & Calibre RVE Good interpersonal skills and critical thinking abilities to resolve the issue technically, and professionally. Key Responsibilities: Independently execute block/IP-level analog layout from schematics, including area estimation, floorplan optimization, routing, a...

: To work independently on block/IP levels analog layout design from schematic. Estimating the Area, Optimizing Floorplan, Routing and Verifications. Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 5,7,10, 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence Virtuoso Editor & Calibre RVE Good interpersonal skills and critical thinking abilities to resolve the issue technically, and professionally. Key Responsibilities: Independently execute block/IP-level analog layout from schematics, including area estimation, floorplan optimization, routing, a...

Job Title: Senior EDA Engineer Cadence Virtuoso, SKILL/CDF, Tool Integration Role Overview: We are seeking a highly skilled EDA Engineer with solid experience in Cadence Virtuoso environments and a deep understanding of OpenAccess databases, SKILL scripting, foundry PDK/CDK integration, and schematic/layout tool automation. This role will collaborate closely with AI/EDA development teams to build seamless design flows and robust automation for our AI-powered analog design platform. Key Responsibilities: Develop, maintain, and optimize analog/mixed-signal IC design flows in Cadence Virtuoso and related EDA tools. Create, modify, and optimize SKILL scripts for automation of layout, schematic, ...

Need to work in collaboration with global design teams across sites. Will be responsible for driving innovation in Analog IP designs. Responsible for design of IPs like Switched capacitor circuits , Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc using industry standard EDA tools. Should provide technical leadership and mentor junior engineers. Responsible for developing processes and robust design methodology. Help build overall competency in Analog domain. Qualifications Bachelors/ Masters degree in Electrical/ Electronics Engineering with 8+ years of experience in Analog Circuit Design across different technologies. S...

We are looking for a digital Place&Route specialist that can strengthen our abilities in the digital pnr space We are offering a position in our design center in Bangalore (India) or Bucharest (Romania) to: + Influence EDA vendors developments on the features, performance and quality of their digital design tools + Establish new tools and methodologies increasing the quality of onsemi s products + Continuously make proposition to improve EDA tools environment and methodologies in order to improve designer productivity and satisfaction level + Support the worldwide digital design community in using Synopsys Fusion Compiler and other EDA tools and internally developed scripts

We are seeking a highly skilled and experienced Principal Engineer to join our ASIC Development Engineering team in Bengaluru, India. In this role you will design and implements IPs and subsystems. Dealing the best of class IPs for all SanDisk products BE or Master's in Electronics or Electrical Engineering, Computer Engineering, or a related field 8+ years of experience in ASIC development, with a proven track record of leading complex project At hands on in IP / blocks / subsystem complex design in verilog / sysverilog Strong digital design development and execution skills , solving bugs Experience in grooming team of 1-4 engineers, interacting with many team Deep expirience in debug , sol...

Need to work in collaboration with global analog teams across sites. Will be responsible for driving innovation in Analog IP designs. Responsible for design of IPs like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc using industry standard EDA tools. Should provide technical leadership and mentor junior engineers. Responsible for developing processes and robust design methodology. Help build overall competency in Analog domain. Qualifications Bachelor or Master Degree in Electrical/Electronic Engineering with 12+ years of experience in Analog design across different technologies. Should have experience in developing ana...

Need to work in collaboration with global design teams across sites. Will be responsible for driving innovation in Analog IP designs. Responsible for design of IPs like Switched capacitor circuits , Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc using industry standard EDA tools. Should provide technical leadership and mentor junior engineers. Responsible for developing processes and robust design methodology. Help build overall competency in Analog domain. Qualifications Bachelors/ Masters degree in Electrical/ Electronics Engineering with 8+ years of experience in Analog Circuit Design across different technologies. S...