324 Eda Tools Jobs - Page 2

The Physical Design Manager role at MIPS involves leading and guiding teams in the creation of custom integrated circuits (ICs) to meet specific customer requirements. You will oversee the entire physical design process, from synthesis to verification, ensuring project efficiency, quality, and innovation. Your responsibilities will include managing a team of physical design engineers, developing design strategies, maintaining re-use methodologies, and collaborating with cross-functional teams and customers to deliver optimized solutions. You should have a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, along with at least 5 years of experien...

You will collaborate with system architects and micro-architects to define high-level, implementable SoC specifications. Your responsibility will include owning end-to-end SOC RTL delivery while analyzing and optimizing design for power, performance, and area (PPA) targets. You will influence SoC definition, features, and adopt physical design friendly partitioning. Leading RTL design and integration of multi-subsystem SoCs, supporting complex architectures with multi-core, multi-power, and multi-reset domains will be a key aspect of your role. Demonstrating strong proficiency with front-end flows, including Lint, CDC, low-power (UPF) checks, synthesis, DFT, and Static Timing Analysis (STA) ...

As a Design Engineer-2 FPGA Architecture at Lattice Semiconductor, you will be part of a dynamic team focused on FPGA architecture modeling and system architecture advancements. You will have the opportunity to contribute, learn, innovate, and grow within a fast-paced, results-oriented environment. Your responsibilities will include working in RTL design, utilizing best-in-class coding styles, algorithms, and both Verilog and System Verilog. You will be involved in architecture modeling and evaluation of Lattice FPGAs and Software tools to measure performance, power, and area for various workloads. Additionally, you will drive subsystem development, ensuring designs meet high standards of qu...

As an Analog Design Engineer in the Consumer Audio Amplifier Group, you will be responsible for designing and developing state-of-the-art audio amplifiers. You will work with a team of experts in the industry, focusing on Audio CLASSD Amplifier with High-Voltage designs and precise current sensing. Your role will involve managing and leading product development, developing circuits, and influencing decisions that impact various products and teams. You will have the opportunity to work on cutting-edge analog and power semiconductor processes, interact with wafer fabrication facilities, and learn about product development processes, qualification, and manufacturing flows. Additionally, your ro...

As an FPGA Architect at NEC Corporation India Pvt. Ltd, you will be responsible for designing and implementing high-performance FPGA designs for wireless communication and aerospace systems. You will conduct research and development activities related to logical synthesis, netlist partitioning, placement, and routing optimizations for FPGA prototyping. Your role will involve optimizing FPGA designs for latency, throughput, power, performance, and area efficiency. Additionally, you will evaluate and select appropriate technologies and tools to support the development process, collaborating with cross-functional teams to align on product requirements and technical specifications. You should po...

You should have a strong understanding of EDA tools and flows, with specific experience in Tempus/Primetime. Your expertise should include timing closure (STA) and various timing closure methodologies. You will be responsible for pre/post-layout constraint development towards timing closure and collaborating with the design team to establish functional/DFT constraints. Additionally, you will need to integrate IP level constraints and define multi-voltage/switching aware corners. An understanding of RC/C model selection and expertise in abstraction techniques such as Hyperscale/ILM/ETM will be crucial for this role. You will also be expected to perform RC balancing and scaling analysis for fu...

Alternate Job Titles: ASIC Physical Design Manager We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and accomplished leader with a deep-rooted expertise in ASIC physical design, ready to take on the challenge of managing complex chip projects from conception to tapeout. With 10-15 years of experience in the ...

In this position you will be integrated in our Foundry IP Development team in Bangalore. In close collaboration with other disciplines across our worldwide engineering teams you will be developing layout for Std cell IP which enable our customers to perform product designs at highest quality standards based on Globalfoundries advanced process nodes. Job Responsibilities The development of product grade Standard Cell IP covering the following phases: Layout Design of Standard Cell IPs Layout checks like LVS, DRC, DFM, EMIR Review of Layouts and extend help for other Layout teams Design Kit prep from layout side, verification and validation Layout automation and script support Being a good tea...

The development of product grade Standard Cell IP covering the following phases: Layout Design of Standard Cell IPs Layout checks like LVS, DRC, DFM, EMIR Review of Layouts and extend help for other Layout teams Design Kit prep from layout side, verification and validation Layout automation and script support Being a good team player, taking key initiatives for productivity improvements and innovation Sign off and release into dedicated IP validation test chips Specification and documentation Support of silicon bring up and characterization Required Qualifications: Bachelor s degree with 10+ years or master s degree with 8+ years experience in semiconductors / Microelectronics / VLSI enginee...

Role: Design Verification Experience: 8+Years Location: Bangalore (WFO) Timings: IST 8+ years of design verification experience. MS (or higher) in EE/EC/ECC Engineering As a member of the Design Verification [Pre-Silicon DV] Team for NXP WCS/SCE BU You will be responsible for verification of various IPs and/or SoC. Candidate must be self-motivated and capable of working independently or as part of a team You will implement simulation testbenches, low power simulation setup, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals. You will also assist with developing test-plans, debugging failures and analyzing coverage information. Must have...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the worlds most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity t...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the worlds most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity t...

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Perform EMIR (Electromigration and IR drop...

As a Senior Physical Design Engineer with Micron Technology, you will play a crucial role in the HBM Team based in Hyderabad, India. Your primary responsibility will be to design and develop complex Application-Specific Integrated Circuits (ASICs) catering to the requirements and specifications of High Bandwidth Memories (HBM). These memories are utilized in intensive applications like artificial intelligence and high-performance computing solutions, aiming to push the boundaries of technology and innovation. Your role involves designing IPs or Hierarchical blocks solutions for high-performance and low-power applications. You will collaborate closely with cross-functional teams to define pro...

At AMD, we are dedicated to transforming lives with our cutting-edge technology to make a positive impact on our industry, communities, and the world. Our goal is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. Central to our mission is the AMD culture, where we continuously strive for innovation to address the world's most pressing challenges. We are committed to achieving excellence in execution while upholding values of directness, humility, collaboration, and inclusivity of diverse perspectives. As a SOC Physical Design Director at AMD, you will play a ...

Millions of people experience Synaptics every day. Your work impacts how people see, hear, touch, and engage with a wide range of IoT applications - at home, at work, in the car or on the go. You will be solving complex challenges alongside the most influential companies in the industry, utilizing advanced algorithms in areas such as machine learning, biometrics, and video processing, combined with world-class software and silicon development. Synaptics is currently seeking a Principal Design for Test Engineer to join our dynamic and growing organization. In this role, you will be responsible for architecting methodologies and flows for WLAN DFT, ATPG, automation, and pre/post Silicon debug....

As a Senior Member of Technical Staff (SMTS) Silicon Design Engineer at AMD, you play a crucial role in the physical design and implementation of advanced semiconductor chips. Your main responsibility is full-chip floor planning, collaborating closely with RTL designers, physical design teams, and other cross-functional groups. This role requires a solid understanding of physical design and chip architecture, as well as experience in floor planning tools and methodologies for high-performance and low-power design. Your technical expertise should include proven experience in top-level floor planning/block partition, SOC floorplan aspects, proficiency in EDA tools like Cadence, Synopsys ICC, C...

At Cadence, we are seeking a talented individual to join our team and contribute to the world of technology. In this role, you will collaborate closely with various cross-functional teams across different locations to ensure alignment on project goals and deliverables. Your responsibilities will also include mentoring junior engineers, fostering innovation, and driving automation initiatives. The ideal candidate should hold a BE/B.Tech/M.E/M.Tech degree with at least 7 years of relevant work experience. A strong understanding of Design for Testability (DFT) concepts and excellent communication skills are essential. Additionally, hands-on experience with industry-standard EDA tools and logic ...

Role & responsibilities Handling hierarchical scan insertion ATPG flow. Integration and Verification of MBIST at RTL level. RTL Integration, Verification, gate level Coverage and GLS enablement for LBIST. Implementation and Verification of IEEE1149.1 JTAG, IJTAG standards. Post silicon debug activities for DFT patterns. Collaboration with RTL design, Physical design and verification teams will be a daily aspect of the role. Preferred candidate profile Degree/PG in Electrical/Electronic Engineering, Computer Engineering or Computer Science. At least 12+ years of experience in related domains and have working knowledge of industry standard digital EDA toolkits. Must be conversant on EDA tools ...

Staff Analog Design Engineer Responsibilities: Developing low-power, high-performance analog circuits, including low phase noise/precision oscillators, DACs, and LDOs, in advanced process nodes. Defining circuit implementation architecture based on specifications, creating transistor-level designs, and collaborating with analog layout designers for optimization. Creating and maintaining documentation for designs, including specifications, test plans, usage guidelines, and limitations. Collaborating with system architects, the analog design team, and the DV (Design Verification) team for modeling and digital/mixed-signal top verification. Mentoring junior designers and sharing best practices ...

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

Conduct classroom and online training sessions on VLSI design and verification. Teach HDL languages (Verilog, VHDL, SystemVerilog) and ASIC/FPGA design flows. Send Resume to : kalyangalactix@gmail.com Call : 7993047034 Provident fund

he ideal candidate should be passionate about software engineering and possess leadership skills to drive sophisticated issues to resolution. Able to communicate effectively and work optimally with different teams across AMD. A good understanding of FPGA is beneficial KEY RESPONSIBILITIES: Work with AMD's architecture specialists to improve future products Apply a data minded approach to target optimization efforts Stay informed of software and hardware trends and innovations, especially pertaining to algorithms and architecture Design and develop new groundbreaking AMD technologies Participating and leading new FPGA software and hardware bring ups Debugging/fix existing issues and research ...

At Cadence, we are in search of a candidate with a strong technical background, excellent communication skills, and the ability to quickly adapt to new technologies. This is an exciting opportunity to work in an environment that fosters creativity, innovation, and making a real impact. Our company's focus is on electronic design, utilizing over 30 years of software expertise to bring design concepts to life. We cater to a wide range of industries, including consumer electronics, 5G communications, automotive, and healthcare, among others. As part of the Cadence team, you will have the chance to work with cutting-edge technology and be encouraged to think outside the box. Our employee-centric...

We are seeking a highly skilled and experienced Principal Engineer to join our ASIC Development Engineering team in Bengaluru, India. In this role you will design and implements IPs and subsystems. Dealing the best of class IPs for all SanDisk products BE or Masters in Electronics or Electrical Engineering, Computer Engineering, or a related field 8+ years of experience in ASIC development, with a proven track record of leading complex project At hands on in IP / blocks / subsystem complex design in verilog / sysverilog Strong digital design development and execution skills , solving bugs Experience in grooming team of 1-4 engineers, interacting with many team Deep expirience in debug , solv...