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10.0 - 14.0 years
12 - 16 Lacs
bengaluru
Work from Office
We are seeking an experienced RTL Design Engineer to join our Digital Design team and contribute to the development of Aevas 4-D Lidar processing chip. The role involves implementing and integrating sub-components of the signal processing pipeline in ASICs and FPGAs, including filters, FFTs, and control logic. The engineer will be responsible for writing micro-architecture specifications, coding in SystemVerilog RTL, and validating Aeva-specific sub-components while ensuring functional safety, performance, and robustness. Collaboration with architects, design engineers, verification teams, and system software engineers is essential to meet SOC-level performance, power, and functionality goal...
Posted 2 months ago
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