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Physical Design Engineer Memory Layout (TSMC) Org Linked

2.0 - 6.0 years

0 Lacs

karnataka

On-site

Role Overview: As a Physical Design Engineer specializing in memory layout within leading TSMC process technologies (7nm and below), you will be responsible for designing and developing memory layouts such as SRAM, ROM, and Register Files. Your focus will be on optimizing performance, area, and power efficiency to ensure design integrity and compliance with foundry requirements. This role will allow you to collaborate with global teams and work on cutting-edge technology nodes. Key Responsibilities: - Design and develop memory layouts in advanced process nodes (TSMC 7nm, 5nm, 3nm, 2nm). - Implement layout including floorplanning, placement, routing, and parasitic extraction. - Collaborate wi...

Posted 1 month ago

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