733 Drc Jobs - Page 20

Project Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : SAP Document and Reporting Compliance Good to have skills : NAMinimum 5 year(s) of experience is required Educational Qualification : 15 years full time educationKey Responsibilities:1.Deep business process functional expertise. Developing E2E business process ,understanding the country specific statutory requirement, flow documentation based on discussion with business and requirement analysis. 2.Good team player and be able to lead a team to deliver activities efficiently and effectively. 3.Able to handle cross functional teams communication / co-ordination. Technical Experience:1.Minimum 1 E2E implementation projects exp in S/4HANA Accounting and good Finance functional expertise with 5-6 years of functional experience. 2.Should have understanding of E2E Finance business processes, Business process analysis and study Gap Identification, Business Blueprint, Process Mapping, Configuration, Functional and Technical Specifications Document, Test Case Document, Training Presentation, Conf Guide and User Manual 3.Good understanding of Document & Reporting Compliance (DRC) and hands on experience in E2E implementation of DRC Statutory Reports /E-Invoicing.4.Exposure to Localization or Country Specific Solutions-E-Invoicing/Taxation and well versed with taxation scenarios5.Experience in DRC Report extensibility is added advantage.6.Testing the system and its extensions or modifications7.Experience and knowledge in Taxes on Sales/Purchases; Withholding taxation, Month end process is must.8.SAP S/4 HANA certified will be an added advantage. Professional Attributes:Good Communication Skills Qualification 15 years full time education

Project Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : Workday Core HCM, Workday Pex Good to have skills : NAMinimum 5 year(s) of experience is required Educational Qualification : Mandatory to have Workday Related certification15 years full time education Summary :As an Application Developer, you will design, build, and configure applications to meet business process and application requirements. You will collaborate with teams to ensure successful project delivery and application functionality. Roles & Responsibilities:- Expected to be an SME- Collaborate and manage the team to perform- Responsible for team decisions- Engage with multiple teams and contribute on key decisions- Provide solutions to problems for their immediate team and across multiple teams- Lead application development projects- Conduct code reviews and provide technical guidance- Implement best practices for application development Professional & Technical Skills: - Must To Have Skills: Proficiency in Workday Core HCM, Mandatory to have Workday Related certification- Strong understanding of HR processes and systems- Experience in designing and implementing Workday solutions- Knowledge of integration tools and techniques- Ability to troubleshoot and resolve technical issues Additional Information:- The candidate should have a minimum of 5 years of experience in Workday Core HCM- This position is based at our Bengaluru office- A mandatory Workday Related certification is required Qualification Mandatory to have Workday Related certification15 years full time education

Project Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : SAP Document and Reporting Compliance Good to have skills : NAMinimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time educationKey Responsibilities:1.Deep business process functional expertise. Developing E2E business process, understanding the country specific statutory requirement, flow documentation based on discussion with business and requirement analysis. 2.Good team player and be able to lead a team to deliver activities efficiently and effectively. 3.Able to handle cross functional teams communication / co-ordination.4.Assist the Leads to solution prospective responses to Proposals in SAP DRC.Functional Expertise:1.Minimum 1 E2E implementation projects exp in S/4HANA Accounting and good Finance functional expertise with 7-9 years of functional experience. 2.Should have understanding of E2E Finance business processes, Business process analysis and study Gap Identification, Business Blueprint, Process Mapping, Configuration, Functional and Technical Specifications Document, Test Case Document, Training Presentation, Conf Guide and User Manual 3.Good understanding of Document & Reporting Compliance (DRC) and hands on experience in E2E implementation of DRC Statutory Reports /E-Invoicing.4.Exposure to Localization or Country Specific Solutions-E-Invoicing/Taxation and well versed with taxation scenarios5.Experience in DRC Report extensibility is an added advantage.6.Testing the system and its extensions or modifications7.Experience and knowledge in Taxes on Sales/Purchases; Withholding taxation, Month end process is must.8.Knowledge on Integration with other 3rd party taxation tools / engines will be an advantage.9.SAP S/4 HANA certified will be an added advantage. Professional Attributes:Good Communication skills Qualification 15 years full time education

Project Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : SAP Document and Reporting Compliance Good to have skills : NAMinimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time educationKey Responsibilities:1.Deep business process functional expertise. Developing E2E business process, understanding the country specific statutory requirement, flow documentation based on discussion with business and requirement analysis. 2.Good team player and be able to lead a team to deliver activities efficiently and effectively. 3.Able to handle cross functional teams communication / co-ordination.4.Assist the Leads to solution prospective responses to Proposals in SAP DRC. Technical Experience:1.Minimum 1 E2E implementation projects exp in S/4HANA Accounting and good Finance functional expertise with 7-9 years of functional experience. 2.Should have understanding of E2E Finance business processes, Business process analysis and study Gap Identification, Business Blueprint, Process Mapping, Configuration, Functional and Technical Specifications Document, Test Case Document, Training Presentation, Conf Guide and User Manual 3.Good understanding of Document & Reporting Compliance(DRC) and hands on experience in E2E implementation of DRC Statutory Reports /E-Invoicing.4.Exposure to Localization or Country Specific Solutions-E-Invoicing/Taxation and well versed with taxation scenarios5.Experience in DRC Report extensibility is an added advantage.6.Testing the system and its extensions or modifications7.Experience and knowledge in Taxes on Sales/Purchases; Withholding taxation, Month end process is must.8.Knowledge on Integration with other 3rd party taxation tools / engines will be an advantage.9.SAP S/4 HANA certified will be an added advantage. Professional Attributes:Good Communication Skills Qualification 15 years full time education

Project Role : Application Lead Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : SAP Document and Reporting Compliance Good to have skills : NAMinimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time educationKey Responsibilities:1.Deep business process functional expertise. Developing E2E business process, understanding the country specific statutory requirement, flow documentation based on discussion with business and requirement analysis. 2.Good team player and be able to lead a team to deliver activities efficiently and effectively. 3.Able to handle cross functional teams communication / co-ordination.4.Assist the Leads to solution prospective responses to Proposals in SAP DRC. Technical Experience:1.Minimum 1 E2E implementation projects exp in S/4HANA Accounting and good Finance functional expertise with 7-9 years of functional experience. 2.Should have understanding of E2E Finance business processes, Business process analysis and study Gap Identification, Business Blueprint, Process Mapping, Configuration, Functional and Technical Specifications Document, Test Case Document, Training Presentation, Conf Guide and User Manual 3.Good understanding of Document & Reporting Compliance(DRC) and hands on experience in E2E implementation of DRC Statutory Reports /E-Invoicing.4.Exposure to Localization or Country Specific Solutions-E-Invoicing/Taxation and well versed with taxation scenarios5.Experience in DRC Report extensibility is an added advantage.6.Testing the system and its extensions or modifications7.Experience and knowledge in Taxes on Sales/Purchases; Withholding taxation, Month end process is must.8.Knowledge on Integration with other 3rd party taxation tools / engines will be an advantage.9.SAP S/4 HANA certified will be an added advantage. Professional Attributes:Good Communication Skills Qualification 15 years full time education

Job Requirements Bachelor’s or master’s Degree with 3-10 years of Analog Layout experience. Good understanding of advanced semiconductor technology process and device physics. Full-custom circuit layout/verification and RC extraction experience. Experience in one or more of the following areas is preferable: Mixed signal/analog/high speed layout, e.g. PLL, IO, RF, PMIC, OSC, DC-DC convertor, Temperature sensor, SRAM, TCAM, ROM, MRAM, ESD Familiar with Cadence Virtuoso environment and various industry physical verification tools (DRC, LVS, DFM, etc). Experiences in advanced technology node under 16nm/14nm/7nm. 5nm/3nm will be an added advantage. Must have expertise on Totem EMIR & Self-heating effects, Star RC extraction, and Calibre PV checks (DRC, LVS, Antenna, ERC, PERC etc.). Good Understanding of layout fundamentals (Matching, EM, ESD, Latch up, coupling, crosstalk etc.). Experience in top-level floorplan, hierarchical layout methodologies Programming skills in "SKILL" automation and circuit Design background is a plus. Good communication skills and willingness to work with global team. Good learning competency, self-motivated, and ability to work in diverse areas in a flexible and dynamic environment Work Experience Must have expertise on Totem EMIR & Self-heating effects, Star RC extraction, and Calibre PV checks (DRC, LVS, Antenna, ERC, PERC etc.). Good Understanding of layout fundamentals (Matching, EM, ESD, Latch up, coupling, crosstalk etc.). Experience in top-level floorplan, hierarchical layout methodologies Programming skills in "SKILL" automation and circuit Design background is a plus

Job Requirements Bachelor’s or master’s Degree with 3-10 years of Analog Layout experience. Good understanding of advanced semiconductor technology process and device physics. Full-custom circuit layout/verification and RC extraction experience. Experience in one or more of the following areas is preferable: Mixed signal/analog/high speed layout, e.g. PLL, IO, RF, PMIC, OSC, DC-DC convertor, Temperature sensor, SRAM, TCAM, ROM, MRAM, ESD Familiar with Cadence Virtuoso environment and various industry physical verification tools (DRC, LVS, DFM, etc). Experiences in advanced technology node under 16nm/14nm/7nm. 5nm/3nm will be an added advantage. Must have expertise on Totem EMIR & Self-heating effects, Star RC extraction, and Calibre PV checks (DRC, LVS, Antenna, ERC, PERC etc.). Good Understanding of layout fundamentals (Matching, EM, ESD, Latch up, coupling, crosstalk etc.). Experience in top-level floorplan, hierarchical layout methodologies Programming skills in "SKILL" automation and circuit Design background is a plus. Good communication skills and willingness to work with global team. Good learning competency, self-motivated, and ability to work in diverse areas in a flexible and dynamic environment Work Experience Must have expertise on Totem EMIR & Self-heating effects, Star RC extraction, and Calibre PV checks (DRC, LVS, Antenna, ERC, PERC etc.). Good Understanding of layout fundamentals (Matching, EM, ESD, Latch up, coupling, crosstalk etc.). Experience in top-level floorplan, hierarchical layout methodologies Programming skills in "SKILL" automation and circuit Design background is a plus.

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: MTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced physical design team of Server SOC and is responsible for delivering the physical design of tiles to meet challenging goals for frequency, power and other design requirements for AMD next generation processors in a fast-paced environment on cutting edge technology. THE PERSON: Engineer with good attitude who seeks new challenges and has good analytical and and problem-solving skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. KEY RESPONSIBILITIES: Implementing RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR Handling different PNR tools - Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk PREFERRED EXPERIENCE: 8+ years of professional experience in physical design, preferably with high performance designs. Experience in automated synthesis and timing driven place and route of RTL blocks for high speed datapath and control logic applications. Experience in automated design flows for clock tree synthesis, clock and power gating techniques, scan stitching, design optimization for improved timing/power/area, and design cycle time reduction. Experience in floorplanning, establishing design methodology, IP integration, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality, familiarity with tools for schematics, layout, and circuit/logic simulation Versatility with scripts to automate design flow. Strong communication skills, ability to multi-task across projects, and work with geographically spread out teams Experience in FinFET & Dual Patterning nodes such as 16/14/10/7/5nm Excellent physical design and timing background. Good understanding of computer organization/architecture is preferred. Strong analytical/problem solving skills and pronounced attention to details. ACADEMIC CREDENTIALS: Qualification: Bachelors or Masters in Electronics/Electrical Engineering LOCATION: Hyderabad / Bangalore #LI-PK2 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. CAD Staff Engineer Our vision is to transform how the world uses information to enrich life. Join an inclusive team focused on one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we create helps make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while contributing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing. Job Description: As a CAD Staff Engineer at Micron Technology, Inc., you will be working in a collaborative, production support role evaluating, improving EDA and debugging both in-house and commercial Electronic Design Automation (EDA) tools and flows for the physical layout, verification and design of CMOS integrated circuits. You will work closely with the Layout design teams to increase their productivity and work efficiency. Responsibilities and Tasks include, but not limited to: Work closely with memory layout teams and solve their daily challenges and provide complete solutions for the future. Proactively identify problem areas for improvement, propose, and develop innovative solutions. Develop methodologies for highly reliable layout with faster Time to Market approach. Continuously evaluate and implement new tools and technologies to improve the current layout development flows. Provide guidance and mentorship to junior members of the team. Qualifications: 8+ years of experience in Layout automation, Physical Verification, or related domains. Experience in customizing a design environment, automation methodologies and utilities to increase memory layout productivity. Working experience in Place and Router flows for custom memory layouts with industry standard tools like Cadence Virtuoso, Synopsys Custom Compiler, Pulsic Unity, Itools etc. Working experience in PDN analysis tools like Totem/VoltusXFA/XA is preferable. Working experience of Physical Verification flow and analyzing/debugging DRC, ERC, LVS, DFM, Antenna Calibre/ICV rule deck issues is plus. Good understanding of advanced CMOS process manufacturing and layout design rules, EMIR, RC-Extraction, ESD, and Latch-up. Good understanding of programming fundamentals, as well as exposure to various programming languages including Skill (Cadence), Perl, Python, Tcl. Working knowledge of Linux is a must. Excellent problem-solving skills with attention to detail. Ability to work in a dynamic environment. Proficiency in working effectively with global teams and stakeholders. Education: A bachelor’s or a master’s degree in Electronics, Electrical or Computer Engineering. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. JR56449 Engineer, DEG Layout Description For more than 40 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are searching for a Senior layout engineer in Micron Technology’s DRAM Engineering Group in India. As a Senior Layout engineer, you will work with an exceptionally talented, passionate core team based in India collaborating with peer teams crossing Micron global footprint, to meet scheduled milestones in a multiple projects-based environment. Role and Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of Sub block-level layouts & review their work Contribute to effective project-management. Effectively communicating with engineering teams in the US, Japan, and Germany to assure the success of the layout project. Qualification/Requirements 3 + year experience in analog/custom layout design in advanced CMOS process. Expertise in Cadence VLE/VXL and Calibre DRC/LVS is a must. Should have hands on experience of Critical Analog Layout design of blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc., Good understanding of Analog Layout fundamentals (e.g. Matching, Electro-migration, Latch-up, coupling, cross-talk, IR-drop, active and passive parasitic devices etc.) Understanding layout effects on the circuit such as speed, capacitance, power and area etc., Ability to understand design constraints and implement high-quality layouts. Excellent command and problem-solving skills in over Physical layout verification. Multiple Tape out support experience will be an added advantage. Scripting and automation experience is good to have but not mandatory. Excellent verbal and written communication skills. BE or MTech in Electronic/VLSI Engineering. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_in@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Knowledge in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Knowledge in Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Good knowledge of Tcl/Perl Scripting Strong problem-solving skills and good communication skills. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 1-3 yrs years of experience in Physical Design/Implementation Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Responsibilities: Assist in the development and validation of PDKs for various process nodes. Support the integration of technology files, DRC/LVS decks, and device models into EDA tools (e.g., Cadence, Synopsys). Write and maintain automation scripts (e.g., Python, TCL, Shell) to streamline PDK development processes. Collaborate with layout, design, and modeling teams to ensure PDK accuracy and usability. Troubleshoot and fix issues in PDK components related to DRC, LVS, parasitic extraction, and schematic symbols. Document PDK features, known issues, and development changes. Show more Show less

What You'll Be Doing: Design and development of transistor-level analog and mixed signal layout. Creating device/block level floorplans, performing placement, routing, and physical verification. Troubleshooting physical verification issues to achieve clean and desired results. Creating and reviewing layout documents to ensure they meet quality standards and are delivered on time. Collaborating with cross-functional teams to optimize the layout design process. Staying updated with the latest industry trends and advancements in layout design techniques. The Impact You Will Have: Contributing to the development of high-performance silicon chips. Ensuring the reliability and accuracy of analog and mixed signal layouts. Enhancing the efficiency of the layout design process. Supporting the delivery of high-quality products that meet industry standards. Facilitating innovation and continuous improvement in layout design techniques. Helping Synopsys maintain its leadership position in the semiconductor industry. What You'll Need: Bachelor's or master's degree in a relevant field. Minimum 3 years of experience in analog and mixed signal circuit layout. Experience with analog layout flow and EDA tools for custom mixed signal layout flows. In-depth knowledge of semiconductor device physics and analog circuits. Proficiency in CMOS and FINFET technologies and CMOS fabrication technology. Understanding of deep sub-micron effects and their impact on layout. Knowledge of EMIR, cross talk, shielding, and their impact on design. Experience in Tcl is a plus.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Knowledge in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Well versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Well versed with Tcl/Perl Scripting Strong problem-solving skills and good communication skills. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3- 6yrs years of experience in Physical Design/Implementation Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3076513 Show more Show less

Kyndryl Embassy Golf Links Business Park, Challaghatta, Bengaluru, Karnataka, India Posted on Jun 11, 2025 Apply now Who We Are At Kyndryl, we design, build, manage and modernize the mission-critical technology systems that the world depends on every day. So why work at Kyndryl? We are always moving forward – always pushing ourselves to go further in our efforts to build a more equitable, inclusive world for our employees, our customers and our communities. The Role As a System Administrator at Kyndryl, you’ll solve complex problems and identify potential future issues across the spectrum of platforms and services. Do you want to be at the forefront of designing and implementing cutting-edge network solutions? Within our Network Services team at Kyndryl, you will be the go-to expert for providing top-of-the-line technical solutions throughout the entire solution lifecycle. You will be responsible for creating local and wide-area network solutions that utilize multiple platforms and protocols, ensuring that our customers have the best possible network infrastructure to support their business needs. Your skills in routers, networking controllers, bridges, and networking software will be essential as you troubleshoot network issues and coordinate with vendors to install the latest hardware and software, such as routers and switches. Not only will you help keep our customer’s networks running smoothly, but you will also work on project implementation, conduct project planning and cost analysis, and build proof-of-concept solutions with networking system technology. In this role, you will have the opportunity to review project requirements, communicate them accurately to the team, and ensure they are appropriately fulfilled. You will use your expertise to design and implement local and wide-area network solutions, including IP and VOIP, that address customer requirements. You will also provide high-quality technical solutions to our customers to prepare them for implementation, go-live, and maintenance. Key Responsibilities Implement and manage branch side Switch - VLANs, VTP, and tracking, Ensure network availability, performance, and security. Troubleshoot branch WAN issues using tools like ping, traceroute, and SNMP. Provide L1 support for branch networks, resolving hardware and software issues for Network devices. Ensure branch network devices are compliant with customer security policies. Participate in network upgrades, migrations, and projects. Collaborate with cross-functional teams to resolve network-related issues. Identify and resolve network-related issues using logical troubleshooting methodologies. Analyse network logs, packet captures, and performance metrics, Escalate complex issues to senior engineers. If you are excited about using your technical expertise to create innovative network solutions and provide outstanding customer service, then this is the role for you! Your Future at Kyndryl At Kyndryl, we understand the importance of investing in our employees' professional growth and development. In Network Services, you can expect to receive a lot of support for training programs to keep your skills and knowledge up to date with the latest industry trends and technologies. By joining our team, you will have the opportunity to work on cutting-edge projects and contribute to the development of innovative solutions for our customers – including new wireless and 5G technologies – not yet adopted by most companies. Who You Are You’re good at what you do and possess the required experience to prove it. However, equally as important – you have a growth mindset; keen to drive your own personal and professional development. You are customer-focused – someone who prioritizes customer success in their work. And finally, you’re open and borderless – naturally inclusive in how you work with others. Required Technical And Professional Expertise 3 years of experience in Network support covering WAN technologies MPLS, SDWAN etc. Strong understanding of TCP/IP, routing protocols (OSPF, EIGRP), and switching fundamentals. Experience with Cisco IOS and network management tools, Familiarity with WAN technologies (MPLS, VPNs). Monitor branch WAN links for availability, latency, and packet loss. Configure and troubleshoot network devices, including routers, switches, modems etc. Collaborate with telecom DC & DRC teams to resolve branches WAN-related issues Configure, monitor, and troubleshoot Cisco, Juniper, HP ant other OEM routers and switches. Preferred Technical and Professional Experience CCNP or equivalent certification. Experience with SDWAN, and VPNs. Familiarity with ITIL or similar service management frameworks. Being You Diversity is a whole lot more than what we look like or where we come from, it’s how we think and who we are. We welcome people of all cultures, backgrounds, and experiences. But we’re not doing it single-handily: Our Kyndryl Inclusion Networks are only one of many ways we create a workplace where all Kyndryls can find and provide support and advice. This dedication to welcoming everyone into our company means that Kyndryl gives you – and everyone next to you – the ability to bring your whole self to work, individually and collectively, and support the activation of our equitable culture. That’s the Kyndryl Way. What You Can Expect With state-of-the-art resources and Fortune 100 clients, every day is an opportunity to innovate, build new capabilities, new relationships, new processes, and new value. Kyndryl cares about your well-being and prides itself on offering benefits that give you choice, reflect the diversity of our employees and support you and your family through the moments that matter – wherever you are in your life journey. Our employee learning programs give you access to the best learning in the industry to receive certifications, including Microsoft, Google, Amazon, Skillsoft, and many more. Through our company-wide volunteering and giving platform, you can donate, start fundraisers, volunteer, and search over 2 million non-profit organizations. At Kyndryl, we invest heavily in you, we want you to succeed so that together, we will all succeed. Get Referred! If you know someone that works at Kyndryl, when asked ‘How Did You Hear About Us’ during the application process, select ‘Employee Referral’ and enter your contact's Kyndryl email address. Apply now See more open positions at Kyndryl Show more Show less

This job is with Kyndryl, an inclusive employer and a member of myGwork – the largest global platform for the LGBTQ+ business community. Please do not contact the recruiter directly. Who We Are At Kyndryl, we design, build, manage and modernize the mission-critical technology systems that the world depends on every day. So why work at Kyndryl? We are always moving forward - always pushing ourselves to go further in our efforts to build a more equitable, inclusive world for our employees, our customers and our communities. The Role As a System Administrator at Kyndryl, you'll solve complex problems and identify potential future issues across the spectrum of platforms and services. Do you want to be at the forefront of designing and implementing cutting-edge network solutions? Within our Network Services team at Kyndryl, you will be the go-to expert for providing top-of-the-line technical solutions throughout the entire solution lifecycle. You will be responsible for creating local and wide-area network solutions that utilize multiple platforms and protocols, ensuring that our customers have the best possible network infrastructure to support their business needs. Your skills in routers, networking controllers, bridges, and networking software will be essential as you troubleshoot network issues and coordinate with vendors to install the latest hardware and software, such as routers and switches. Not only will you help keep our customer's networks running smoothly, but you will also work on project implementation, conduct project planning and cost analysis, and build proof-of-concept solutions with networking system technology. In this role, you will have the opportunity to review project requirements, communicate them accurately to the team, and ensure they are appropriately fulfilled. You will use your expertise to design and implement local and wide-area network solutions, including IP and VOIP, that address customer requirements. You will also provide high-quality technical solutions to our customers to prepare them for implementation, go-live, and maintenance. Key Responsibilities Implement and manage branch side Switch - VLANs, VTP, and tracking, Ensure network availability, performance, and security. Troubleshoot branch WAN issues using tools like ping, traceroute, and SNMP. Provide L1 support for branch networks, resolving hardware and software issues for Network devices. Ensure branch network devices are compliant with customer security policies. Participate in network upgrades, migrations, and projects. Collaborate with cross-functional teams to resolve network-related issues. Identify and resolve network-related issues using logical troubleshooting methodologies. Analyse network logs, packet captures, and performance metrics, Escalate complex issues to senior engineers. If you are excited about using your technical expertise to create innovative network solutions and provide outstanding customer service, then this is the role for you! Your Future at Kyndryl At Kyndryl, we understand the importance of investing in our employees' professional growth and development. In Network Services, you can expect to receive a lot of support for training programs to keep your skills and knowledge up to date with the latest industry trends and technologies. By joining our team, you will have the opportunity to work on cutting-edge projects and contribute to the development of innovative solutions for our customers - including new wireless and 5G technologies - not yet adopted by most companies. Who You Are You're good at what you do and possess the required experience to prove it. However, equally as important - you have a growth mindset; keen to drive your own personal and professional development. You are customer-focused - someone who prioritizes customer success in their work. And finally, you're open and borderless - naturally inclusive in how you work with others. Required Technical And Professional Expertise 3 years of experience in Network support covering WAN technologies MPLS, SDWAN etc. Strong understanding of TCP/IP, routing protocols (OSPF, EIGRP), and switching fundamentals. Experience with Cisco IOS and network management tools, Familiarity with WAN technologies (MPLS, VPNs). Monitor branch WAN links for availability, latency, and packet loss. Configure and troubleshoot network devices, including routers, switches, modems etc. Collaborate with telecom DC & DRC teams to resolve branches WAN-related issues Configure, monitor, and troubleshoot Cisco, Juniper, HP ant other OEM routers and switches. Preferred Technical and Professional Experience CCNP or equivalent certification. Experience with SDWAN, and VPNs. Familiarity with ITIL or similar service management frameworks. Being You Diversity is a whole lot more than what we look like or where we come from, it's how we think and who we are. We welcome people of all cultures, backgrounds, and experiences. But we're not doing it single-handily: Our Kyndryl Inclusion Networks are only one of many ways we create a workplace where all Kyndryls can find and provide support and advice. This dedication to welcoming everyone into our company means that Kyndryl gives you - and everyone next to you - the ability to bring your whole self to work, individually and collectively, and support the activation of our equitable culture. That's the Kyndryl Way. What You Can Expect With state-of-the-art resources and Fortune 100 clients, every day is an opportunity to innovate, build new capabilities, new relationships, new processes, and new value. Kyndryl cares about your well-being and prides itself on offering benefits that give you choice, reflect the diversity of our employees and support you and your family through the moments that matter - wherever you are in your life journey. Our employee learning programs give you access to the best learning in the industry to receive certifications, including Microsoft, Google, Amazon, Skillsoft, and many more. Through our company-wide volunteering and giving platform, you can donate, start fundraisers, volunteer, and search over 2 million non-profit organizations. At Kyndryl, we invest heavily in you, we want you to succeed so that together, we will all succeed. Get Referred! If you know someone that works at Kyndryl, when asked 'How Did You Hear About Us' during the application process, select 'Employee Referral' and enter your contact's Kyndryl email address. Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Knowledge in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Knowledge in Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Good knowledge of Tcl/Perl Scripting Strong problem-solving skills and good communication skills. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 1-3 yrs years of experience in Physical Design/Implementation Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3076510 Show more Show less

We are looking for a Digital/Memory Mask Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling challenging high-speed digital memory circuit designs. NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! What You'll Be Doing Implement IC layout of innovative, high-performance, high-speed CMOS integrated circuits in foundry CMOS process nodes in 3nm,5nm, 7nm and lower nodes following industry standard methodologies. Lead the architecture and layout design of key memory subsystems, including control logic, sense amplifiers, I/O blocks, bit-cell arrays, and decoders for advanced technology nodes. Direct custom layout and verification of complex memory cells, setting standards and methodologies for compiler-driven design flows. Be responsible for and optimize all physical verification activities, including DRC, LVS, density analysis, and comprehensive tape-out checks. Drive the identification and resolution of complex physical design issues in compiler-generated layouts, mentoring junior engineers in established methodologies. Provide guidance on IR drop and EM mitigation strategies, establishing design methodologies for robust memory layouts. Possess deep expertise in ultra-deep sub-micron layout challenges, regularly innovating and implementing advanced solutions. Development of memory compilers, leading solving efforts and driving optimization for performance, area, and manufacturability. Cultivate effective teamwork across multi-functional teams, influencing project direction and ensuring alignment with organizational objectives. Excel in resource management, representing the team in technical discussions with customers IP layout will comprise of significant digital components. Adopting and putting in place the best layout practices/methodology for composing digital Memory layouts Follow company procedures and practices for IC layout activities. What We Need To See B.E/B Tech. / M Tech in Electronics or equivalent experience with 2+ years of proven experience in Memory layout in advanced CMOS process. Detailed knowledge of industry standard EDA tools for Cadence. Experience with layout of high-performance memories of various types. Knowledge of Layout basics including the various types of bitcells, Decoder, LIO etc. (matching devices, symmetrical layout, signal shielding) Experience with floor planning, block level routing and macro level assembly. Detailed knowledge of top level verification including the EM/IR quality checks and detailed knowledge of layout dependent effects including LOD, Dummification, fills etc. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status JR1997059 Show more Show less

We are looking for a Digital/Memory Mask Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling challenging high-speed digital memory circuit designs. NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! What You'll Be Doing Implement IC layout of innovative, high-performance, high-speed CMOS integrated circuits in foundry CMOS process nodes in 3nm,5nm, 7nm and lower nodes following industry standard methodologies. Lead the architecture and layout design of key memory subsystems, including control logic, sense amplifiers, I/O blocks, bit-cell arrays, and decoders for advanced technology nodes. Direct custom layout and verification of complex memory cells, setting standards and methodologies for compiler-driven design flows. Be responsible for and optimize all physical verification activities, including DRC, LVS, density analysis, and comprehensive tape-out checks. Drive the identification and resolution of complex physical design issues in compiler-generated layouts, mentoring junior engineers in established methodologies. Provide guidance on IR drop and EM mitigation strategies, establishing design methodologies for robust memory layouts. Possess deep expertise in ultra-deep sub-micron layout challenges, regularly innovating and implementing advanced solutions. Development of memory compilers, leading solving efforts and driving optimization for performance, area, and manufacturability. Cultivate effective teamwork across multi-functional teams, influencing project direction and ensuring alignment with organizational objectives. Excel in resource management, representing the team in technical discussions with customers IP layout will comprise of significant digital components. Adopting and putting in place the best layout practices/methodology for composing digital Memory layouts Follow company procedures and practices for IC layout activities. What We Need To See B.E/B Tech. / M Tech in Electronics or equivalent experience with 2+ years of proven experience in Memory layout in advanced CMOS process. Detailed knowledge of industry standard EDA tools for Cadence. Experience with layout of high-performance memories of various types. Knowledge of Layout basics including the various types of bitcells, Decoder, LIO etc. (matching devices, symmetrical layout, signal shielding) Experience with floor planning, block level routing and macro level assembly. Detailed knowledge of top level verification including the EM/IR quality checks and detailed knowledge of layout dependent effects including LOD, Dummification, fills etc. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. JR1997057 Show more Show less

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Knowledge in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Knowledge in Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Good knowledge of Tcl/Perl Scripting Strong problem-solving skills and good communication skills. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3- 6yrs years of experience in Physical Design/Implementation

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. * Hands on PD execution at block/SoC level along with PPA improvements * Strong understanding of the technology and PD Flow Methodology enablement. * Work with Physical design engineers to rollout robust, identify areas for flow improvement methodologies. (area/power/performance/convergence), develop plans and deploy/support them * Provide tool support and issue debugging services to physical design team engineers across various sites * Develop and maintain 3rd party tool integration and productivity enhancement routines * Understand advance tech PNR and STA concepts and methodologies and work closely with EDA vendors to deploy solutions. Skill Set * Strong programming experience & Proficiency in Python/Tcl/C++ * Understand physical design flows using Innovus/fc/icc2 tools * Knowledge of one of Encounter/Innovus or FC (or other equivalent PNR tool) is mandatory * Basic understanding of Timing/Formal verification/Physical verification/extraction are desired * Ability to ramp-up in new areas, be a good team player and excellent communication skills desired Experience 3-5 years of experience with the Place-and-route and timing closer and power analysis environment is required Niche Skills Handling support tools like Encounter/Innovus/edi/fc/Icc2 (or other equivalent PNR tool). One or more of the above is mandatory*

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles Synthesis, Static Timing Analysis and LEC of SoC/Cores Full chip and block level timing closure, IO budgeting for blocks Logical equivalence check between RTL to Netlist and Netlist to Netlist Knowledge of low-power techniques including clock gating, power gating and MV designs ECO timing flow Proficient in scripting languages (TCL and Perl). Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 1-5 yrs of experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Minimum Qualifications Bachelor's/Masters degree in Electrical/Electronic Engineering from reputed institution 7+ years of experience in Physical Design/Implementation Minimum : Physical Implementation activities for high performance GPU Core, which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Strong expertise in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Well versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Well versed with Tcl/Perl Scripting Experience of working as part of a larger team and working towards project milestones and deadlines; Handle technical deliverables with a small team of engineers. Strong problem-solving skills and good communication skills.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux- Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 8+ years Hardware Engineering experience or related work experience. 6+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles Synthesis, Static Timing Analysis and LEC of SoC/Cores Full chip and block level timing closure, IO budgeting for blocks Logical equivalence check between RTL to Netlist and Netlist to Netlist Knowledge of low-power techniques including clock gating, power gating and MV designs ECO timing flow Proficient in scripting languages (TCL and Perl). Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Bachelors / Masters degree in electrical or electronics engineering with 3-6 yrs of experience is preferred