12.0 - 14.0 years

0 Lacs

bengaluru, karnataka, india

On-site

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SILICON DESIGN ENGINEER(Timing Constraints/STA Signoff Technical Lead) The Role As a m...

Posted 2 weeks ago

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Static Timing Analysis Infogrowth

7.0 - 10.0 years

35 - 40 Lacs

bengaluru

Work from Office

SDC and constraints syntax Timing signoff tools like Primetime / Tempus is a must MMMC, DMSA or Tweaker Block /SOC,AOCV/POCV, TCL / Perl.

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STA, Synthesis Wafer Space - An ACL Digital Company

4.0 - 8.0 years

0 Lacs

karnataka

On-site

You should have a strong understanding of EDA tools and flows, with specific experience in Tempus/Primetime. Your expertise should include timing closure (STA) and various timing closure methodologies. You will be responsible for pre/post-layout constraint development towards timing closure and collaborating with the design team to establish functional/DFT constraints. Additionally, you will need to integrate IP level constraints and define multi-voltage/switching aware corners. An understanding of RC/C model selection and expertise in abstraction techniques such as Hyperscale/ILM/ETM will be crucial for this role. You will also be expected to perform RC balancing and scaling analysis for fu...

Posted 1 month ago

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STA Lead ACL Digital

7.0 - 11.0 years

0 Lacs

karnataka

On-site

You should be well versed with timing closure (STA) and timing closure methodologies, along with the ability to develop pre/post-layout constraints for timing closure. You will be required to collaborate with the design team to establish functional/DFT constraints and integrate IP level constraints. Additionally, you should have experience in defining multi-voltage/switching aware corner definitions, selecting RC/C models, and possessing expertise in abstraction techniques such as Hyperscale/ILM/ETM. In this role, you will be responsible for conducting RC balancing and scaling analysis of full chip clocks as well as critical data paths. Proficiency in automation using PERL, TCL, and EDA tool...

Posted 3 months ago

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Synthesis/STA Semicon TechnoLabs

3.0 - 12.0 years

0 Lacs

karnataka

On-site

You will be joining a leading training institute in the semiconductor industry that is constantly seeking dedicated individuals who are enthusiastic about achieving excellence and eager to expand their knowledge. Our work environment is dynamic, fostering innovation and creativity, and we provide avenues for personal and professional growth through training programs, mentorship, and coaching. The position available is for Synthesis/STA in either Bengaluru or Noida with a requirement of 3-12 years of experience and a BTECH/MTECH qualification. Key Responsibilities: - Demonstrated proficiency in timing concepts and the ability to independently close timing of Block/SoC. - Hands-on experience i...

Posted 3 months ago

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Principal STA / Synthesis Engineer Mulya Consulting

10.0 - 20.0 years

100 - 150 Lacs

Hyderabad

Hybrid

Principal STA / Synthesis Engineer Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore A US based well-funded product-based startup looking for Highly talented Engineers for the following roles. Constraint development Constraint management Constraint validation Chip top level synthesis, sta and Timing Closure. RTL2GDS flow. Ability to handle synthesis,sta, lec, upf flow methodologies. TCL/perl/python scripting. Candidate with 12-17 yrs exp in Synthesis / STA role Experience in handling complex data path-oriented multi-million gate synthesis Working Knowledge of Physical synthesis using tools li...

Posted 5 months ago

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