12.0 - 15.0 years

6 - 10 Lacs

hyderabad, bengaluru, delhi / ncr

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What youll have 12+ Years of experience in developing and implementing DFT architecture and test strategies for complex ASIC/SoC Designs In-Depth knowledge and hands-on experience of industry standard and proprietary DFT techniques, such as, SCAN/ATPG, Built-in-Self Test (MBIST/LBIST) Architecture , JTAG (IEEE 1149.x/1500/1687), Boundary Scan (BSCAN) and compression/decompression technologies on Digital and Mixed Signal SoCs In-Depth knowledge of EDA tools used for DFT, especially Mentor/Synopsys tools Scripting expertise in Python/PERL, TCL, etc Experience in RTL coding and SDC creation for DFT Modes Recent Tapeout experience in advanced nodes Location: Remote- Bengaluru,Hyderabad,Delhi / NCR,Chennai,Pune,Kolkata,Ahmedabad,Mumbai

Posted 14 hours ago

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