1672 Dft Jobs - Page 8

Are you passionate about hardware engineering and eager to kick-start your career We are looking for a Junior Hardware Engineer to join our dynamic team and contribute to cutting-edge technology solutions. As a Junior Hardware Engineer, you will be responsible for design development, testing, and debugging in high-speed digital, analog, and processor fields. You will be involved in component selection, developing BOMs, and designing hardware circuits for analog/digital/mixed signal using microcontrollers and 32-bit processors. Your role will also include supporting NPD projects, developing embedded system products, and collaborating with the production team for manufacturing. To excel in this role, you should have a BE/B.Tech in Electronics & Telecommunication/Instrumentation or a similar field with 3-8 years of experience in electronics embedded hardware design, development, and production. Proficiency in computer-aided design (CAD) tools, particularly Altium, is preferred. Strong knowledge of communication protocols such as UART, I2C, SPI, and USB is essential, along with experience in 16-bit/32-bit ARM microcontroller-based electronics development. You should possess hands-on skills with testing equipment like Multi-meters, Scopes, DCAs, Logic Analyzers, and Spectrum Analyzers. Additionally, exceptional circuit assembly skills in Through Hole and SMD techniques are required. Keeping abreast of industry trends and being willing to learn emerging technologies are also key aspects of this role. Good communication, writing, and documentation skills are crucial for preparing technical documentation, reports, and collaborating with other teams. Your ability to troubleshoot and debug hardware to ensure optimal performance will be instrumental in the success of our projects. Furthermore, your expertise in DFMA, DFT, and other production NPI processes will be valuable assets to our team. In addition to technical skills, we value good research, teamwork, and interpersonal skills. The willingness to work overtime when required, the ability to work independently and collaboratively, and staying updated with industry trends are qualities we appreciate in our team members. We offer a competitive salary based on experience, annual salary increases, bonuses, and a health policy for both you and your family. Our workweek consists of 5 days with 8 hours per day from 10.00 am to 6.00 pm. You will also have 10 public holidays, 12 casual leaves, 12 sick leaves, and 15 privilege leaves per year. In times of need, compassionate leave is also available to support you. Join us in shaping the future of hardware engineering and be part of a team that values innovation, collaboration, and personal growth.,

Roles and Responsibilities Develop and maintain verification testbenches for SoC-level simulation and validation Create detailed verification plans based on design specifications and architectural documents Implement and run directed and constrained-random tests using SystemVerilog and UVM Debug RTL and gate-level simulations to identify and resolve design and testbench issues Contribute to regression testing, coverage analysis, and sign-off activities Work closely with cross-functional teams including design, DFT, and firmware engineers Support post-silicon bring-up and validation when required Requirements Strong experience in SystemVerilog and UVM for verification of digital designs Deep understanding of SoC architecture, buses (e.g., AXI, AHB), and peripheral IPs Experience in writing test cases, assertions, and functional coverage models Familiarity with simulators such as VCS, Questa, or Incisive Hands-on experience with scripting languages like Python, Perl, or Shell for automation Exposure to version control and bug tracking tools Ability to analyze and debug waveform dumps and simulation failures

Job Title: Quality Control Engineer Company: Retail Detailz India Pvt Ltd Location: Bhandup, Mumbai, India Quality Control Engineer – Sheet Metal Overview: We are seeking a detail-oriented Quality Control Engineer to ensure precision and quality in our sheet metal manufacturing processes. Responsibilities: Inspect and test sheet metal products using visual, dimensional, and NDT methods (UT, MPT, DFT, Impact Test). Develop and implement quality assurance procedures. Investigate defects, perform root cause analysis, and drive corrective actions. Maintain inspection records, prepare quality reports, and conduct trend analysis. Monitor supplier quality and support procurement in resolving issues. Train production teams on quality standards and techniques. Requirements: Diploma/Bachelor’s in Mechanical Engineering. Experience in sheet metal quality control. Strong knowledge of QA/QC tools and quality management systems. Ability to read engineering drawings. Analytical, detail-oriented, with good communication skills. Job Type: Full-time Pay: ₹25,000.00 - ₹35,000.00 per month Benefits: Health insurance Application Question(s): What is your current CTC & expected CTC? How many years of sheet metal fabrication industry experience you have? What is your Notice period? Experience: total work: 2 years (Required) Location: Bhandup West, Mumbai, Maharashtra (Required) Work Location: In person

You will be working as a DV, RTL, PD, DFT Engineer at Primesoc Technologies in Bengaluru. Your role will involve developing high-performance architectures of Digital IP controllers, ensuring the smooth functioning of devices with a focus on area, power, and performance factors. You should possess DV, RTL, PD, DFT skills and have experience in developing low power, high-performance architectures. Hands-on experience with FPGA validation and silicon realization will be necessary. Strong problem-solving and analytical skills are required for this role. Additionally, excellent written and verbal communication skills are essential. A Bachelor's or Master's degree in Electrical Engineering or a related field is preferred for this full-time on-site position.,

- Lead the architecture, design and development of Processor Core Vector- Scalar Execution unit for high-performance IBM Systems. - Architect and design Fixed point/Floating point/Vector/SIMD/Crypto instructions of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise - 8 or more years of demonstrated experience in architecting and designing Execution unit of CPU - Hands on experience of implementing Arithmetic/Crypto/SIMD functions - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of instruction dispatch and load/store units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Master's Degree/PhD

Analyse customer requirements, legal regulations and internal specification to be applied in Testing strategies of products Develop EOLT specifications for new equipments (Hardware & Software) Design and develop complex test programs, process and systems to measure product functionality and integrality in the electrical and programming domains Analyse test cases and failure, providing scenarios and proposing actions based on results Checks product SW and Test Methodology/Coverage during DFT Design Review, with R&D interaction May make himself some functional Tester software development and improvements Checks the Functional Testers development (review of technical issues and planning) Work with the Software Validation Team to ensure complete test coverage of all requirements Analyze the customer specifications, legal requirements and internal specifications towards the development of electronic test plans Support the creation of test equipment specifications and tester hardware specifications used in the development of automated test rack systems Perform validation, capabilities, test coverage and stability performance of testers Monitor testing TLR, analyse defects, and propose action plans to reduce Validate PG RAISE and CdC standards which are created by M/D Standard Owners Validate any change of standard propose by sites in new investments for Testing equipments Validate the assembly line included on each CAA, in concept, cycle time and investment values Contribute to product & process FMEA, assisting Testing technicians in daily activities Support transition of newly developed processes into series production, providing process / equipment specification and qualification Define activities to permit integration of Testing equipments into more complex manufacturing cells Perform survey of equipment in continuous improvement & cost reduction mindset to optimize investments, material & labor costs Develop an industrial cross-project competence Promote the Valeo Industrial standard rules and procedures Ensure the respect of Safety and Environment procedures of Valeo Group

This role is for a Senior Principal DFT Engineer with proven ability in Design for Test Experience coding Verilog RTL, TCL and/or Perl Proficient in Unix/Linux environments Core DFT skills considered for this position should include some of the following: Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics Bachelors or Master s degree or equivalent experience in Electronic Engineering, Computer Engineering, or a related field Nice To Have Skills and Experience : Familiarity with IEEE 1149, 1500, 1687, 1838 Synthesis & Static Timing Analysis Familiarity with SoC style architectures including multi-clock domain and low power design practices. Validated understanding of Siemens DFT tools Familiarity with Arm IP like the following: Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug Experience with 2.5D and 3D test Ability to work both collaboratively on a team and independently Hard-working and excellent time management skills with an ability to multi-task An upbeat demeanor to working on exciting projects on the cutting edge of technology Experience with Siemens, Cadence, and/or Synopsys DFT and simulation tool

Experience with signal chain optimization is highly desired Key Duties & Responsibilites + Must have a working knowledge of Cadence Circuit design tools + Analytical approach to problem solving is required CMOS designs provide challenging learning opportunities where performance, power and reliability are all pushed to the limit while maintaining product execution schedule + Drive development and verification of state-of-the-art analog blocks and mixed signal CMOS designs which can be reused across different market segments + Participate in analog circuit requirements discussions, technical issues and other design aspects to arrive at agreed upon product specifications + Build/develop circuits based on an IP specification, drive the layout design and final IP characterization + Execute state-of-the-art analog designs while following the best design practices with on time quality design releases + Propose innovative and creative solutions where necessary to meet customer & product needs + Work diligently with the given requirements to accomplish project goals and meet schedule requirements + Debug of complex integrated circuit problems in the laboratory Collaborate in debug efforts as needed + Perform bench characterization and support application engineering bench evaluation efforts + Analyze design aspects related to DFT and collaborate with other team members to develop DFT strategy for block designs +

This position offers a great opportunity to work on industry leading semiconductor devices, targeted for broad applications in Automotive and Industrial markets In this role, you ll be a member of New Product Development team, tasked with supporting product lines and business P&Ls on new product development activities, including defining Analog/Digital DfT and test strategies, developing low-cost test solutions for complex Analog, Mixed Signal, and Digital roadmap products on ATE platforms, and productizing ICs in-line with business goals and growth projections Knowledge and experience with software development utilizing C++ / C / Python / JAVA is necessary Candidate should know ATE platform architecture and programming languages to develop low level ATE code for Analog / Mixed Signal blocks End goal is to design and productize deep Analog and Mixed Signal test automated solutions, enabling organization benchmarks in quality, efficient code, and test-cost goals onsemi*(Nasdaq: ON) is driving disruptive innovations to help build a better future With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure

This position offers a great opportunity to work on industry leading semiconductor devices, targeted for broad applications in Automotive and Industrial markets In this role, you ll be a member of New Product Development team, tasked with supporting product lines and business P&Ls on new product development activities, including defining Analog/Digital DfT and test strategies, developing low-cost test solutions for complex Analog, Mixed Signal, and Digital roadmap products on ATE platforms, and productizing ICs in-line with business goals and growth projections Knowledge and experience with software development utilizing C++ / C / Python / JAVA is necessary Candidate should know ATE platform architecture and programming languages to develop low level ATE code for Analog / Mixed Signal blocks

Job Description As part of the Central Engineering CAD department, we are responsible for the evaluation, acquisition, development, integration and support of design tools and methodologies towards the worldwide BU development teams. We are looking for a digital Place&Route specialist that can strengthen our abilities in the digital pnr space. We are offering a position in our design center in Bangalore (India) or Bucharest (Romania) to: Influence EDA vendors’ developments on the features, performance and quality of their digital design tools. Establish new tools and methodologies increasing the quality of onsemi’s products Continuously make proposition to improve EDA tools environment and methodologies in order to improve designer productivity and satisfaction level. Support the worldwide digital design community in using Synopsys Fusion Compiler and other EDA tools and internally developed scripts. L1-LK1 Responsibilities MS Electrical Engineering, Computer Science or related field, or BS with experience. 2-5 years of expertise on Place and Route tools is a must (Synopsys Fusion Compiler). Preferably on multi-million gate designs in mature node technologies (65nm) and using Low power design techniques (UPF) Experience with complete digital design flow and design tools (Synthesis, Static Timing Analysis, DFT, Logic Equivalence Checking, ATPG, Place and Route …) from EDA vendors such as Cadence, Mentor, Synopsys … Experience with Linux as a user environment Affinity with programming & scripting languages such as Perl, TCL, Python, QT, C, C++, makefiles … Having experience with revision controlled development environments (SVN, Cliosoft) is a plus. A team player with excellent communication skills – verbal and written Fluent in English. L1-LK1 Qualifications MS Electrical Engineering, Computer Science or related field, or BS with experience. About Us onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world. More details about our company benefits can be found here: https://www.onsemi.com/careers/career-benefits About The Team We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.

Your Job To help develop / support new and existing PCB that meets or exceeds customer expectations. Provide guidance for new PCB development to generate revenue and growth for Business Unit. To grow his/her team members in becoming high performers. What You Will Do Design and develop printed circuit boards (PCBs), including schematic capture, multilayer layout, and DFM/DFA best practices. Ensure electronic designs are optimized for manufacturing using both wave soldering and pick-and-place assembly processes. Oversee and support the full manufacturing process, including SMT, THT, and manual assembly operations. Identify and Resolve PCB assembly issues, including solder defects, component placement errors, and thermal concerns and add improvement plans to address soldering issues during the design phase itself. Lead prototype builds and transition designs into volume production, ensuring cost-effectiveness and reliability. Collaborate with contract manufacturers and in-house teams for prototyping, testing, and transitioning designs into volume production. Manage BOMs, component sourcing, and work closely with supply chain teams for lead time and availability optimization. Maintain accurate documentation for designs, assembly processes. Who You Are (Basic Qualifications) B.E./B.Tech Degree in Electrical or Electronics Engineering PCB design using tools such as Cadence and Altium Designer. Hands-on experience with wave soldering techniques and pick-and-place machines (e.g., Yamaha, Juki, Mycronic, etc.). Strong knowledge of SMT and THT assembly processes and IPC standards (e.g., IPC-A-610). Familiarity with DFM, DFA, and DFT principles. Proven ability to collaborate with EMS providers and in-house manufacturing teams. What Will Put You Ahead Technical leadership experience in PCB Design At Koch companies, we are entrepreneurs. This means we openly challenge the status quo, find new ways to create value and get rewarded for our individual contributions. Any compensation range provided for a role is an estimate determined by available market data. The actual amount may be higher or lower than the range provided considering each candidate's knowledge, skills, abilities, and geographic location. If you have questions, please speak to your recruiter about the flexibility and detail of our compensation philosophy. Who We Are {Insert company language from Company Boilerplate Language Guide} At Koch, employees are empowered to do what they do best to make life better. Learn how our business philosophy helps employees unleash their potential while creating value for themselves and the company. Additionally, everyone has individual work and personal needs. We seek to enable the best work environment that helps you and the business work together to produce superior results.

Job Description Position: DFT Lead Location: Bangalore, India Duration: Full Time Responsibilities: Responsible for writing timing constraints, running synthesis and implementing DFT (including scan, MBIST and IP testing), you will work on the company s next generation 5G IC and interact with software, signal processing algorithms, integration and layout teams. Requirements: At least 8 years experience of ASIC synthesis (including writing SDC), DFT (including scan and MBIST) and equivalence check, ideally with Cadence tools. Knowledge of CPF and Cadence CLP is a bonus. Highly motivated, pro-active self-starter. Strong sense of ownership and responsibility. Creative thinker with strong problem solving skills. Team oriented attitude and ability to thrive in a multicultural environment. Excellent written and oral communications skills. Qualifications: Bachelor s degree or higher in Computer Science or a related field. 8+ years of experience.

LTTS India Mysore Job Description Experience in Product design and development from requirements to Conceptual design to architectural design to detailed design and analysis Experience in designing low to high power analog electronic boards (for example power converter topology like Flyback, Buck, Boost, LLC) for Lighting Industry Capable to design power supply upto 250W Experience in LED Driver with various Dimming interfaces such as 0-10V, DALI, DMX etc. Ability to design circuits, perform design calculations, magnetic design, stress analysis and simulations. Have knowledge in Specification, design and verification of electronic boards. Experience in compliance standard for LED driver UL, FCC, IEC, BIS Knowledge of using simulation tools (LTSPICE, TINA etc) for functional simulation and power integrity analyses Good at troubleshooting skills on Electrical / Electronic boards to find the root cause and to propose the best solution Should have experience of working with multi-disciplinary team (Mechanical team for thermal analysis & enclosures design, PCB layout team and suppliers) Should have an understanding and use of DFMEA tools Definition and choice of components (including derating) Definition of electrical schematics and building blocks Boards place & route (including signal integrity) PCB design guidelines with respect to DFM, DFT, Thermal, EMI. Manufacturing failures analysis / Root cause analysis Test procedures definition and execution Experience in Thermal testing, conducted and radiated emission tests Job Requirement Power Electronics, hardware designing, design calculation, lighting industry

Job ID: 37272 Location: Chennai, IN Area of interest: Technology Job type: Regular Employee Work style: Office Working Opening date: 20 Aug 2025 JOB SUMMARY Understand requirement, prepare and execute tests and adhere to all test controls Good experience in Integration Testing, System Testing, API Testing. The senior automated test facilitator will work across several application team(s) to coach team members, embed processes and facilitate change. They will ensure that teams can validate the quality of the product delivered to the stakeholders as per group standards. Experience in FileNet Application Testing, API Automation preferred. Must have Technical skills Understand BDD and functional test automation Familiar with non-functional requirements of software development and have a grasp of 12 factor app methodology Have demonstrable programming knowledge in one OOP language, preferably Java Familiar with Performance Testing (e.g. volume testing) is a plus Full understanding of the SDCL, especially Agile methodologies Familiar with test management process ISTQB or Agile Test Certified Banking domain knowledge is a plus Some understanding of Big Data and warehousing technologies such as Hadoop, Kafka, Teradata would be nice to have Previous coaching or consultancy experience Understanding of continuous integration and deployment processes, or have the desire to learn RESPONSIBILITIES Business Test Delivery Identify and analyse issues in requirements, design specifications, application architecture as well as product documentation. Develop test specifications based on various requirement documents within schedule constraints. Develop test bed and/or test data and verify test environments (based on project requirements). Develop regression packs to ensure that requirements from previous scope are still functioning as before. Perform functional and technical test execution activities (automated testing, where applicable) as per project engagement. Perform non-functional test execution activities (performance testing, where applicable) as per project engagement. Identify and is familiar with negative testing, to be included in the developed test specifications. Constant communication and follow up with various stakeholders during test planning and execution phases. Report and update test status promptly and accurately. Enable project meetings to provide feedback and statistics of the project in relation to the test quality. Able to contribute to multiple projects, whilst still ensuring process compliance and deliverables are adhere to. Able to work independently as well as a team in providing out-of-the box solution if required. To collaborate/troubleshoot with the development and delivery team for technical issues that requires result analysis and feedback. Processes Process and Compliance Good understanding and able to apply test processes laid down within the test team, and/or standards as defined by project and SCB. Ability to work in a highly compliant landscape and work within the boundaries of globally defined software quality management practices and policies Understand that traceability and reporting are extremely important in highly compliant environments and be prepared to engrain these practices in team’s ways of working Regulatory & Business Conduct Display exemplary conduct and live by the Group’s Values and Code of Conduct. Take personal responsibility for embedding the highest standards of ethics, including regulatory and business conduct, across Standard Chartered Bank. This includes understanding and ensuring compliance with, in letter and spirit, all applicable laws, regulations, guidelines and the Group Code of Conduct. Lead to achieve the outcomes set out in the Bank’s Conduct Principles Effectively and collaboratively identify, escalate, mitigate and resolve risk, conduct and compliance matters. Our Ideal Candidate Functional testing Automation testing selenium and cucumber Test management SDLC process About Standard Chartered We're an international bank, nimble enough to act, big enough for impact. For more than 170 years, we've worked to make a positive difference for our clients, communities, and each other. We question the status quo, love a challenge and enjoy finding new opportunities to grow and do better than before. If you're looking for a career with purpose and you want to work for a bank making a difference, we want to hear from you. You can count on us to celebrate your unique talents and we can't wait to see the talents you can bring us. Our purpose, to drive commerce and prosperity through our unique diversity, together with our brand promise, to be here for good are achieved by how we each live our valued behaviours. When you work with us, you'll see how we value difference and advocate inclusion. Together we: Do the right thing and are assertive, challenge one another, and live with integrity, while putting the client at the heart of what we do Never settle, continuously striving to improve and innovate, keeping things simple and learning from doing well, and not so well Are better together, we can be ourselves, be inclusive, see more good in others, and work collectively to build for the long term What we offer In line with our Fair Pay Charter, we offer a competitive salary and benefits to support your mental, physical, financial and social wellbeing. Core bank funding for retirement savings, medical and life insurance, with flexible and voluntary benefits available in some locations. Time-off including annual leave, parental/maternity (20 weeks), sabbatical (12 months maximum) and volunteering leave (3 days), along with minimum global standards for annual and public holiday, which is combined to 30 days minimum. Flexible working options based around home and office locations, with flexible working patterns. Proactive wellbeing support through Unmind, a market-leading digital wellbeing platform, development courses for resilience and other human skills, global Employee Assistance Programme, sick leave, mental health first-aiders and all sorts of self-help toolkits A continuous learning culture to support your growth, with opportunities to reskill and upskill and access to physical, virtual and digital learning. Being part of an inclusive and values driven organisation, one that embraces and celebrates our unique diversity, across our teams, business functions and geographies - everyone feels respected and can realise their full potential. www.sc.com/careers

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Experience: Minimum 4 to 6 years of hands on experience in Synthesis and LEC Job Role Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure. Experience in all aspects of timing closure for multi-clock domain designs. Should be familiar with MCMM synthesis and optimization. Should have good understanding of low-power design implementation using UPF. Experience with scripting language such as Perl/ Python, TCL. Experience with different power optimization flows or technique such as clock gating. Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation Should be able to handle ECOs and formal verification and maintain high quality matrix Skill Set Proficiency in Python/Tcl Familiar with Synthesis tools (Fusion Compiler/Genus) , Fair knowledge in LEC, LP signoff tools Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus Should be sincere, dedicated and willing to take up new challenges Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Experience: Minimum 2 years of hands-on experience in Synthesis and LEC Job Role Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure. Experience in all aspects of timing closure for multi-clock domain designs. Should be familiar with MCMM synthesis and optimization. Should have good understanding of low-power design implementation using UPF. Experience with scripting language such as Perl/ Python, TCL. Experience with different power optimization flows or technique such as clock gating. Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation Should be able to handle ECOs and formal verification and maintain high quality matrix Skill Set Proficiency in Python/Tcl Familiar with Synthesis tools (Fusion Compiler/Genus) , Fair knowledge in LEC, LP signoff tools Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus Should be sincere, dedicated and willing to take up new challenges Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. 8+ years experience in the area of ASIC/DFT In depth knowledge of DFT concepts In depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations Expertise in scripting languages such as perl, shell, etc. Experience in simulating test vectors Knowledge of equivalence check, DFT DRC rules both in RTL lint tool (like spyglass) and ATPG tool like (TK, TetraMax) Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter Test is a plus Ability to work in an international team, dynamic environment Ability to learn and adapt to new tools and methodologies. Ability to do multi-tasking & work on several high priority designs in parallel. Excellent problem solving skills Excellent communication and team work skills and good English is required Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

6 to 12 years' experience in ASIC/DFT - simulation and Silicon validation, DFT concepts, pattern simulation, Silicon debug and yield enhancement ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description Position Overview: We are seeking a highly skilled and experienced Staff Engineer for our Static Timing Analysis (STA) function. The successful candidate will be part to a team of talented engineers responsible for ensuring the timing performance and integrity of our complex semiconductor designs. This role requires a deep understanding of STA methodologies, leadership skills, and a strategic vision to drive continuous improvement in our timing analysis processes. Key Responsibilities Own Subsystem level STA , providing direction and guidance to PnR team for Timing closure & Synthesis report analysis. Work with IP & Design team for Timing constraints Development & Review activities. Develop and implement advanced STA methodologies and strategies to meet the timing closure requirements of complex IC designs. Collaborate with cross-functional teams, including design, verification, physical design, and DFT, to ensure seamless integration and optimal timing performance. Drive the development and maintenance of STA scripts and tools to automate and streamline timing analysis processes. Conduct thorough timing analysis, identify critical paths, and develop strategies to mitigate timing violations and improve overall design performance. Stay abreast of industry trends and emerging technologies in STA and related fields, and incorporate best practices into the team’s workflow. Prepare and present detailed timing reports and technical documentation to stakeholders Foster a culture of innovation, collaboration, and continuous improvement within the STA team. Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. A minimum of 5 years of experience in Static Timing Analysis. Proven track record of successfully executing STA In-depth knowledge of STA tools (e.g., Synopsys PrimeTime, Cadence Tempus , Constraints Manager) and methodologies. Strong understanding of digital design principles, physical design, and semiconductor fabrication processes. Excellent problem-solving skills and the ability to think strategically and analytically. Exceptional communication and interpersonal skills, with the ability to effectively collaborate with cross-functional teams and stakeholders. Ability to prioritize tasks and manage multiple project work simultaneously. A proactive, results-oriented mindset with a passion for innovation and continuous improvement. Experience with advanced process nodes (e.g., 7nm, 5nm) is highly desirable. Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description Position Overview: We are looking for a highly skilled and experienced individual for SoC PD lead position for driving SoC implementation efforts from RTL to GDSII. This role is pivotal within our talented team of engineers, ensuring that we meet our GDS release timelines, PPA requirements, and all sign-off criteria for our complex semiconductor designs. This role demands a profound technical understanding of the entire implementation cycle, from start to finish, as well as exceptional leadership skills. The successful candidate will work with various functional teams and must possess a strategic vision to drive continuous improvement in our methodologies and processes. Key Responsibilities To be responsible for leading RTL-to-GDSII SoC implementation effort To collaborate with cross-functional teams, including Design, Verification, Analog, DFT, SIPI etc. To develop and guide the team members in their work, enhancing their technical capabilities and increasing productivity. To ensure process compliance during project execution and enable / participate in technical discussions/reviews. To prepare and submit status reports for minimizing exposure and risks on the project or closure of escalations. Stay abreast of industry trends and emerging technologies in related fields, and incorporate best practices into the team’s workflow Foster a culture of innovation, collaboration, and continuous improvement Qualifications Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field A minimum of 13 to 15 years of experience in leading RTL to GDSII implementation effort across various SoCs Proven ability in technically leading a small/medium-sized team for executing projects preferred. Hands-on experience on the entire PD Flow from RTL to GDSII Should have a good understanding of Floor planning, Power Planning, Placement & Optimization, CTS, Routing, Design Convergence, and Sign-off with in-depth expertise in at least one of these domains. Working knowledge about OCV, MM/MC optimization and multi-power designs (Level shifters, Isolation cells, etc) Exposure to static timing analysis fixes including automated ECO generation. Strong in areas on CTS, Power, Bump planning, Floorplan Experience with tools (e.g., Synopsys FusionCompiler, PrimeTime, Cadence Innovus, Constraints Manager, Redhawk, Calibre etc.) and methodologies. Library preparation in any environment (Synopsys, Cadence, etc) Working knowledge on Physical verification tasks at lower nodes (database merging/DRC/LVS/ERC/PERC/Antenna/ESD/LUP analysis/fixing) at block level/chip level The job would require complete ownership from RTL to GDS for complete SoC Exposure to IP Hardening for blocks like SERDES, USB PHY, PCIe, DDR will be an added advantage. Working knowledge of scripting languages like Perl and TCL will be considered a plus Candidate needs to be self-driven and confident in reporting the status and sharing technical results with customers. Must have the ability to present to senior management, work in a geographically dispersed team, and be aware of cross-cultural nuances. Should be able to define project milestones, identify risks, and call out mitigation plans. Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description Join SanDisk India as a Technical ASIC Project Leader and take charge of developing cutting-edge ASICs that power the next generation of SD cards for imaging, gaming, mobile, and data storage. This is a high-impact leadership role where your technical expertise and strategic vision will drive projects from concept to mass production. Key Responsibilities Lead Full-Cycle SoC Development: Own the end-to-end development of high-performance ASIC controllers, from architecture definition to production ramp-up. Translate Product Vision into Technical Execution: Collaborate with product, firmware, and system teams to define ASIC requirements aligned with SanDisk’s storage solutions. Drive Cross-Functional Collaboration: Partner with SoC Design, Verification, Validation, DFT, Physical Design, Mixed-Signal IP, Foundry, Hardware, Firmware, and Test Engineering teams to deliver industry-leading SoC solutions. Ensure Technical Excellence: Conduct in-depth technical reviews, identify risks early, and implement mitigation strategies to ensure project success. Mentor and Inspire: Provide technical leadership and mentorship to engineering teams, fostering a culture of innovation, accountability, and continuous improvement. Communicate with Impact: Deliver clear, concise, and transparent project updates to stakeholders, ensuring alignment and enthusiasm across all levels. Qualifications Master’s degree in electrical engineering, Computer Engineering, or a related field. Proven experience leading complex ASIC or SoC development projects. Strong technical background in digital design, verification, and silicon validation with understanding of the SD, UHS and SD-Express standards. Excellent cross-functional leadership and communication skills. Ability to manage technical risks and drive execution in a fast-paced environment. Passion for innovation and delivering high-quality, scalable solutions. Preferred Qualifications Proficiency with EDA tools and methodologies for ASIC development. Familiarity with industry standards and best practices in semiconductor design. Expertise in low-power design techniques and high-speed interfaces. Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

Job Title Post-doctoral fellow Location Coimbatore, Tamilnadu Required Number 1 Qualification The candidate should have a Ph.D. in Materials Science/Physics/Chemistry with Polymers/Polymer nanocomposites as the area of research. Proven record of scientific publication related to Polymer nanocomposites and ability to work independently Job Description The selected candidate will undertake research focused on exploring structure–property relationships in conducting polymer composites, particularly for applications in microwave absorption, piezoelectric devices, and triboelectric nanogenerators This work will be conducted under the mentorship of Dr. B. T. S. Ramanujam, Assistant Professor, Department of Physics, Amrita School of Physical Sciences, Coimbatore. Key Responsibilities Proficiency in electrospinning techniques is a prerequisite for this role. While experience with simulation tools or density functional theory (DFT) calculations is advantageous, it is not mandatory. The candidate is expected to carry out independent research and disseminate findings through publications in high-impact scientific journals. Job Category Research Last date to apply September 5, 2025

Job Summary Understand requirement, prepare and execute tests and adhere to all test controls Good experience in Integration Testing, System Testing, API Testing. The senior automated test facilitator will work across several application team(s) to coach team members, embed processes and facilitate change. They will ensure that teams can validate the quality of the product delivered to the stakeholders as per group standards. Experience in FileNet Application Testing, API Automation preferred. Must Have Technical Skills Understand BDD and functional test automation Familiar with non-functional requirements of software development and have a grasp of 12 factor app methodology Have demonstrable programming knowledge in one OOP language, preferably Java Familiar with Performance Testing (e.g. volume testing) is a plus Full understanding of the SDCL, especially Agile methodologies Familiar with test management process ISTQB or Agile Test Certified Banking domain knowledge is a plus Some understanding of Big Data and warehousing technologies such as Hadoop, Kafka, Teradata would be nice to have Previous coaching or consultancy experience Understanding of continuous integration and deployment processes, or have the desire to learn Responsibilities Business Test Delivery Identify and analyse issues in requirements, design specifications, application architecture as well as product documentation. Develop test specifications based on various requirement documents within schedule constraints. Develop test bed and/or test data and verify test environments (based on project requirements). Develop regression packs to ensure that requirements from previous scope are still functioning as before. Perform functional and technical test execution activities (automated testing, where applicable) as per project engagement. Perform non-functional test execution activities (performance testing, where applicable) as per project engagement. Identify and is familiar with negative testing, to be included in the developed test specifications. Constant communication and follow up with various stakeholders during test planning and execution phases. Report and update test status promptly and accurately. Enable project meetings to provide feedback and statistics of the project in relation to the test quality. Able to contribute to multiple projects, whilst still ensuring process compliance and deliverables are adhere to. Able to work independently as well as a team in providing out-of-the box solution if required. To collaborate/troubleshoot with the development and delivery team for technical issues that requires result analysis and feedback. Processes Process and Compliance Good understanding and able to apply test processes laid down within the test team, and/or standards as defined by project and SCB. Ability to work in a highly compliant landscape and work within the boundaries of globally defined software quality management practices and policies Understand that traceability and reporting are extremely important in highly compliant environments and be prepared to engrain these practices in team’s ways of working Regulatory & Business Conduct Display exemplary conduct and live by the Group’s Values and Code of Conduct. Take personal responsibility for embedding the highest standards of ethics, including regulatory and business conduct, across Standard Chartered Bank. This includes understanding and ensuring compliance with, in letter and spirit, all applicable laws, regulations, guidelines and the Group Code of Conduct. Lead to achieve the outcomes set out in the Bank’s Conduct Principles Effectively and collaboratively identify, escalate, mitigate and resolve risk, conduct and compliance matters. Our Ideal Candidate Functional testing Automation testing selenium and cucumber Test management SDLC process About Standard Chartered We're an international bank, nimble enough to act, big enough for impact. For more than 170 years, we've worked to make a positive difference for our clients, communities, and each other. We question the status quo, love a challenge and enjoy finding new opportunities to grow and do better than before. If you're looking for a career with purpose and you want to work for a bank making a difference, we want to hear from you. You can count on us to celebrate your unique talents and we can't wait to see the talents you can bring us. Our purpose, to drive commerce and prosperity through our unique diversity, together with our brand promise, to be here for good are achieved by how we each live our valued behaviours. When you work with us, you'll see how we value difference and advocate inclusion. Together We Do the right thing and are assertive, challenge one another, and live with integrity, while putting the client at the heart of what we do Never settle, continuously striving to improve and innovate, keeping things simple and learning from doing well, and not so well Are better together, we can be ourselves, be inclusive, see more good in others, and work collectively to build for the long term What We Offer In line with our Fair Pay Charter, we offer a competitive salary and benefits to support your mental, physical, financial and social wellbeing. Core bank funding for retirement savings, medical and life insurance, with flexible and voluntary benefits available in some locations. Time-off including annual leave, parental/maternity (20 weeks), sabbatical (12 months maximum) and volunteering leave (3 days), along with minimum global standards for annual and public holiday, which is combined to 30 days minimum. Flexible working options based around home and office locations, with flexible working patterns. Proactive wellbeing support through Unmind, a market-leading digital wellbeing platform, development courses for resilience and other human skills, global Employee Assistance Programme, sick leave, mental health first-aiders and all sorts of self-help toolkits A continuous learning culture to support your growth, with opportunities to reskill and upskill and access to physical, virtual and digital learning. Being part of an inclusive and values driven organisation, one that embraces and celebrates our unique diversity, across our teams, business functions and geographies - everyone feels respected and can realise their full potential.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Experience: Minimum 2 to 4 years of hands on experience in Synthesis and LEC Job Role Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure. Experience in all aspects of timing closure for multi-clock domain designs. Should be familiar with MCMM synthesis and optimization. Should have good understanding of low-power design implementation using UPF. Experience with scripting language such as Perl/ Python, TCL. Experience with different power optimization flows or technique such as clock gating. Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation Should be able to handle ECOs and formal verification and maintain high quality matrix Skill Set Proficiency in Python/Tcl Familiar with Synthesis tools (Fusion Compiler/Genus), Fair knowledge in LEC, LP signoff tools Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus Should be sincere, dedicated and willing to take up new challenges Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.