3030 Dft Jobs - Page 8

We are looking for a Lead / Senior Electronics Hardware Engineer in the team. In this role, candidate is expected to have a hands-on experience in hardware design and development of digital and analogue electronics; analogue and mixed domain circuits solutions. As a core member of Electronics system design team you will drive microprocessors/ micro controllers, SoC / SoM based processing unit design and peripheral interface control, power electronics for power supply, power distribution and battery charging management, BMS and embedded systems board bring-up, integration, functional and environmental qualification. Core Responsibilities: 1. Design and develop electronics hardware platform fo...

Job Details Job Description: Drives and develops testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Contributes to design, development, and validation of testability circuits, test flows, and methodologies for new products through evaluation, development, and debug of complex test methods. Interfaces with process development, fab, factory, assembly, quality and reliability, and manufacturing groups to enable postsilicon HVM ramp. Evaluates new designs on automatic test equipment (ATE) and works with the design, DFx, and product development teams to debug functionality and performance issues to root cause. Performs ATE device...

Key Skills: DFT, DFT Design, Scan Insertion, ATPG, MBIST Roles and Responsibilities: Develop and implement DFT strategies including scan compression and insertion, Memory BIST, and Logic BIST. Conduct at-speed testing and fault simulation to ensure product quality. Perform back-annotated gate-level verification and silicon debug. Utilize Verilog RTL, TCL, and/or Perl for coding tasks. Work proficiently in Unix/Linux environments. Collaborate with cross-functional teams to integrate DFT solutions into designs. Stay updated with industry standards such as IEEE 1149, 1500, 1687, and 1838. Engage in continuous learning and application of new DFT methodologies and tools. Skills Required: Strong e...

About the Role Position: Lead DFT Engineer Experience: 8+ years Responsibilities Develop and implement DFT architecture for complex SoCs and IPs. Perform Scan Insertion, Scan Stitching, and Scan Chain Optimization. Execute ATPG pattern generation, compression, coverage analysis, and pattern debug. Implement and validate MBIST/BIST architectures, including memory test algorithms and integration. Work closely with RTL, PD, and Verification teams to ensure DFT features are seamlessly integrated. Perform DFT rule checks, linting, and resolve violations. Conduct gate-level simulations for DFT verification (DFT-GLS). Support timing closure for DFT modes in collaboration with STA teams. Generate hi...

Job Details Job Description: Drives and develops testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Contributes to design, development, and validation of testability circuits, test flows, and methodologies for new products through evaluation, development, and debug of complex test methods. Interfaces with process development, fab, factory, assembly, quality and reliability, and manufacturing groups to enable postsilicon HVM ramp. Evaluates new designs on automatic test equipment (ATE) and works with the design, DFx, and product development teams to debug functionality and performance issues to root cause. Performs ATE device...

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Depending on the expertise, the below set of responsibilities can be interpreted for fastspice(Primesim/Finesim) or Verilog (Xcelium/VCS) based verification. Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing and debugging pre-sil...

DFT (Design-For-Testability) Engineer Experience: 5–15 Years Location: Bangalore About the Role: We are seeking an experienced DFT Engineer to join our ASIC/SoC design team. You will be responsible for developing DFT architectures, integrating test logic, enabling high fault coverage, and supporting silicon bring-up to ensure robust manufacturability and yield. Key Responsibilities: Develop and implement DFT strategies: scan insertion, ATPG, BIST, boundary scan, JTAG. Work closely with RTL, verification, physical design, and layout teams to integrate test features with minimal area/performance impact. Build test plans, test infrastructures, and test patterns; perform automated test generatio...

Requisition ID: 104075-0 CAD Engineer 2 Duties of Position: (Include specific duties and responsibilities) Requires a broad knowledge of PCB Layout Engineering practices, manufacturing process and IPC standards Should be responsible to adhere the DFM/DFA and DFT process and preparing the files for PCB Fabrication and Assembly Execute the High speed Design boards and support team members to develop skill sets for Sanmina Design specifications. Should interact with SI and PI team. Design consideration for EMI/EMC, thermal and Mechanical performance enhancement Design the complex and multi-Layer PCB Board using Cadence Allegro Tool. Technical expertise to handle project independently Design con...

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwid...

You will be responsible for: - Designing and implementing DFT IP with Verilog/SystemVerilog and/or VHDL - Designing and implementing RTL for DFT IP including POST, IST - Developing synthesis automation for DFT IP including synthesis and timing constraints, RTL insertion, and verification - Owning and maintaining, extending, and enhancing existing DFT IP like LBIST At Cadence, you will have the opportunity to work on impactful projects in the world of technology. Join us in solving challenges that others can't.,

We are seeking a SoC DFT Lead who will be responsible for defining the SoC DFT architecture, collaborating with customers and internal teams, and supervising the end-to-end SoC DFT process, from architecture definition to silicon bring-up. Responsibilities: Lead the DFT team responsible for delivering comprehensive DFT solutions for complex SoCs. Take end-to-end ownership of the DFT lifecycle - from architecture definition to silicon bring-up and production ramp. Collaborate cross-functionally with architecture, design, and physical design teams to ensure optimal testability integration. Define and track DFT milestones, quality metrics, and progress, ensuring alignment with program schedules...

General Summary: Qualcomm GPU team is actively seeking candidates for several physical design engineering positions. Graphics HW team in Bangalore is part of a worldwide team responsible for developing and delivering GPU solutions which are setting the benchmark in mobile computing industry.Team is involved in Architecture, Design, Verification, implementation and Productization of GPU IP COREs that go into Qualcomm Snapdragon SOC Products used in Smartphone, Compute, Automotive, AR/VR and other low power devices. Qualcomm has strong portfolio of GPU COREs and engineers get an opportunity to work with world class engineering team that leads industry through innovation and disciplined executi...

Greetings from Synergy Resource Solutions, a leading recruitment consultancy firm. We are hiring for our Client company details are as given below: Company: Employee Strength: 10+ Employees Company specializes in engineering technical systems that power modern entertainment, translating creative visions into seamless live experiences through precision, reliability, and collaboration. Founded on years of industry experience in May 2024, the company supports the entire production lifecycle, from design and fabrication to programming and ongoing support. With a focus on making technology invisible to create a magical storytelling experience, Company ensures technical solutions blend effortlessl...

Your Job To help develop / support new and existing PCB that meets or exceeds customer expectations. Provide guidance for new PCB development to generate revenue and growth for Business Unit. To grow his/her team members in becoming high performers. Our Team We specialize in designing high-performance PCB layouts tailored for high-speed cable and connector solutions, delivering end-to-end support through to final cable assembly. What You Will Do Enhance the PCB Design process by innovating new techniques and methods. Guide the team to provide PCB-related technical support to internal and external customers. Review and validate board designs to meet the standard specifications and customers’ ...

Position: Design Lead- DFT Experience: 7+ relevant experience. Location - India Education: B.Tech/M.Tech To be successful in this role you will: Seeking highly motivated, energetic, team-oriented Individual contributors willing to take the challenge of delivering of complex IPs using the latest advance Design for Test skills and Tools . Technical Skillset Required: Good knowledge in DFT Skills Sound knowledge in DFT Architecture and hands on in Scan , ATPG , Simulation & GLS . Prior experience in Synsopsys or Cadence or Mentor tools Like Tetramax, Modus ,Tessent and DC tools Hands on in MBIST insertion and simulation Knowledge on JTAG is an added advantage . Good Simulation debugging skills ...

About Tessolve Tessolve is a leading engineering solutions provider, enabling silicon and system companies to accelerate their products to market. With capabilities across silicon design, test engineering, and embedded solutions, we are an end-to-end partner for semiconductor companies globally. Job Description We are looking for a Senior STA Engineer with 8 10 years of hands-on experience in Static Timing Analysis for complex SoC/ASIC designs at advanced technology nodes (7nm, 5nm, or below). The ideal candidate should be technically sound, self-driven, and capable of independently owning STA tasks from RTL to signoff. Key Responsibilities Perform full-chip and block-level static timing ana...

Position: DFT-Design Engineer 2 Experience: 2+ years relevant experience. Location - India Education: B.Tech/M.Tech To be successful in this role you will: Seeking highly motivated, energetic, team-oriented Individual contributors willing to take the challenge of delivering of complex IPs using the latest advance Design for Test skills and Tools . Technical Skillset Required: Good knowledge in DFT Skills Sound knowledge in DFT Architecture and hands on in Scan , ATPG , Simulation & GLS . Prior experience in Synsopsys or Cadence or Mentor tools Like Tetramax, Modus ,Tessent and DC tools Hands on in MBIST insertion and simulation Knowledge on JTAG is an added advantage . Good Simulation debugg...

Position: Sr. Design Engineer 2- DFT Experience: 6+ relevant experience. Location - India Education: B.Tech/M.Tech To be successful in this role you will: Seeking highly motivated, energetic, team-oriented Individual contributors willing to take the challenge of delivering of complex IPs using the latest advance Design for Test skills and Tools . Technical Skillset Required: Good knowledge in DFT Skills Sound knowledge in DFT Architecture and hands on in Scan , ATPG , Simulation & GLS . Prior experience in Synsopsys or Cadence or Mentor tools Like Tetramax, Modus ,Tessent and DC tools Hands on in MBIST insertion and simulation Knowledge on JTAG is an added advantage . Good Simulation debuggi...

Position: Sr. Design Engineer 1 Experience: 4+ relevant experience. Location - India Education: B.Tech/M.Tech To be successful in this role you will: Seeking highly motivated, energetic, team-oriented Individual contributors willing to take the challenge of delivering of complex IPs using the latest advance Design for Test skills and Tools . Technical Skillset Required: Good knowledge in DFT Skills Sound knowledge in DFT Architecture and hands on in Scan , ATPG , Simulation & GLS . Prior experience in Synsopsys or Cadence or Mentor tools Like Tetramax, Modus ,Tessent and DC tools Hands on in MBIST insertion and simulation Knowledge on JTAG is an added advantage . Good Simulation debugging sk...

We are seeking a highly experienced Design Verification Engineer to join our team in Bangalore. The ideal candidate will have 5 to 12 years of experience in IP and SOC verification, with a strong foundation in SystemVerilog (SV) and Universal Verification Methodology (UVM). In addition to standard verification skills, this role requires expertise in CDP (Compressed Data Pattern), GDP (Generic Data Pattern), and DFT DV (Design for Test in Design Verification) methods, including JTAG, MBIST (Memory Built-In Self-Test), SCAN, PG (Pattern Generator), and PM (Pattern Memory). Key Responsibilities: IP and SOC Verification Perform comprehensive IP and SOC verification to ensure the reliability and ...

Qualifications: Bachelors or Masters degree in Electrical Engineering or related field (BE/BTech/M.E/M.Tech) Excellent communication skills, both verbal and written Experience: 5-8 years of experience in RTL Design with exposure to synthesis OR 8+ years of experience in RTL Design Strong understanding of digital basics Proficiency in RTL coding (Verilog), IP design, and RTL integration Hands-on experience with LINT, CDC, and RDC Experience in writing UPFs and CLP/VCLP checks Familiarity with synthesis flow and validating design constraints Specific domain knowledge in ARM protocols, PCIe, Ethernet, RISC V, DDR, etc. Strong scripting knowledge Responsibilities: Understand the overall ASIC flo...

- Lead the Architecture, Design and development of processor MMU (Memory management unit) for high-performance IBM Systems. - Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the MMU feature enhancements. - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. the Architecture, Design and development of processor MMU ...

Lead the architecture, design and development of Processor Core Front end of pipeline units for high-performance IBM Systems. - Architect and design I-Cache, Instruction Fetch, Branch Prediction and Decode units of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Pa...

Job Description Drive Architecture that will define the SOC/MCU architecture and detailed technical specifications from product requirements provided by business and product marketing organizations. Collaborate closely with product and software architects to define and refine SoC-level architecture Play a key role in shaping the microarchitecture of complex IP blocks and SoC subsystems Work closely with functional verification teams on test-plan development and reviews Collaborate with other functional teams including Design, Validation, DFT, physical design and emulation teams to achieve architectural goals and performance targets Provide support to functional validation teams in post silic...

Job Description Define and drive Architecture of the chiplets optimized for MCU constraints Define and drive Architecture of the D2D interface IPs targeted for MCU chiplets Collaborate closely with product and software architects to define and refine the architecture Play a key role in shaping the microarchitecture of the IP blocks and the subsystems Work closely with functional verification teams on test-plan development and reviews Collaborate with other functional teams including Design, Validation, DFT, physical design and emulation teams to achieve architectural goals and performance targets Provide support to functional validation teams in post silicon debug IP selection and make/buy d...