14 Dft Implementation Jobs

NextSilicon is reimagining high-performance computing by leveraging intelligent adaptive algorithms to vastly accelerate supercomputers and drive them into a new generation. The new software-defined hardware architecture enables high-performance computing to fulfill its promise of breakthroughs in advanced research fields. NextSilicon's core values include: - Professionalism: Striving for exceptional results through professionalism and unwavering dedication to quality and performance. - Unity: Fostering a collaborative work environment where every employee feels valued and heard. - Impact: Passionate about developing technologies that make a meaningful impact on industries, communities, and ...

As a Synthesis & STA Engineer, your role will involve performing RTL Synthesis to optimize the Performance/Power/Area of designs, implementing DFT insertions such as MBIST and SCAN, setting up Timing Constraints for functional and Test Modes, and conducting Validation. You will be responsible for creating Power Intent for designs, verifying power intent on RTL, running static Low-Power checks on gate level netlists, ensuring Logic Equivalency Checks between RTL to Gates and Gates to Gates, configuring signoff Static Timing Analysis and ECO flows, and achieving timing closure in collaboration with the Design/DFT/PD teams. Additionally, you will be involved in Power Analysis, estimating power ...

Description The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge. Work hard. Have fun. Make history. We are seeking a skilled and hands-on DFT Engineer (Level 5) to contribute to the Design-for-Test (DFT) implementation for SoCs. This role requires strong technical expertise in scan, MBIST, boundary sca...

We are Silicon Labs. We are the leading provider of silicon, software and solutions for a smarter, more connected world. We hire the most innovative talent in the world to solve the industry's toughest problems, providing our customers with significant advantages in performance, energy savings, connectivity and design simplicity. Silicon Labs software and mixed signal engineering teams create solutions for customers in diverse markets including the Internet of Things, (IoT), internet infrastructure, TV tuners, as well as automotive and consumer radios. Our solutions are in products from the market leaders in home automation, electric vehicles, green technology, smart TVs and home voice contr...

As a DFT Lead, you will be responsible for defining, developing, and implementing Design-For-Test (DFT) methodologies for high-performance LiDAR SoCs. You will own DFT planning, insertion, verification, and validation, and collaborate with RTL, Physical Design, IP vendors, and ASIC partners to ensure proper DFT implementation. The role includes supporting post-silicon bring-up, silicon debug, yield improvement, and creating/maintaining documentation and DFT guidelines. You will ensure robust test strategies for automotive-grade SoCs with focus on reliability, quality, and compliance. Location-Remote, Delhi NCR, Bangalore, Chennai, Pune, Kolkata, Ahmedabad, Mumbai, Hyderabad

As a DFT Technical Manager at NextSilicon, you will play a crucial role in the DFT implementation of the company's next SOC. Your primary focus will be on developing and implementing testing methodologies to ensure the functionality, reliability, and manufacturability of integrated circuits (ICs) and other hardware designs. Your responsibilities will include developing DFT flow/methodologies, managing a team of 3-4 DFT engineers, and ensuring thorough testing and fault coverage alignment with industry standards. **Role Overview:** NextSilicon is reimagining high-performance computing with accelerated compute solutions and a software-defined hardware architecture. As a DFT Technical Manager, ...

Description We are seeking a skilled Physical Design Engineer to join our team in India. The ideal candidate will be responsible for the physical design and layout of integrated circuits, ensuring they meet performance, timing, and power specifications. This role requires a strong technical background in VLSI design, as well as experience with various EDA tools. Job Description Working experience of Physical Design Implementation Working experience of Physical Verification, Timing Signoff. Good attitude to learn and deliver. Work from office only. Lower technology node experience. Experience in writing scripts and automation. Working knowledge of Low Power ASIC

Description We are seeking a Senior Physical Design Engineer to join our team in India. The ideal candidate will have a strong background in physical design and a passion for developing high-performance integrated circuits. In this role, you will be responsible for the implementation and optimization of complex IC designs, working closely with cross-functional teams to deliver high-quality products. Responsibilities Develop and implement physical design methodologies for integrated circuits (ICs). Perform floorplanning, placement, clock tree synthesis, and routing for high-performance designs. Work closely with the digital design team to ensure design specifications are met. Conduct timing a...

We are seeking a highly experienced Senior DFT Engineer with 8+ years of hands-on expertise in developing and implementing DFT architectures for complex SoCs. The ideal candidate should have a solid background in scan insertion, ATPG, BIST, and silicon debug. Key Responsibilities: Define and implement DFT architecture for digital and mixed-signal SoCs Perform scan insertion, boundary scan, and ATPG pattern generation Integrate Memory BIST (MBIST) and Logic BIST (LBIST) Drive DFT verification and post-silicon validation/debug Collaborate with RTL, synthesis, STA, and backend teams to ensure testability Ensure high test coverage, test time optimization, and compliance with ATE requirements Req...

You have a great opportunity as a DFT Lead Engineer with 6+ years of experience at a work location in Bangalore or Hyderabad. As a DFT Lead Engineer, you will be responsible for the DFT implementation of the latest products, including scan insertion, ATPG, LBIST, and MBIST. Your role will involve verifying the DFT implementation and delivering test patterns for production testing. Additionally, you will support Silicon bring-up activities to ensure the highest stability of the test pattern. In this position, you will contribute to the overall microcontroller DFT methodology and coordinate DFT work packages. You will be required to engage in hands-on work, provide status reports, and collabor...

You will be responsible for driving DFT implementation in Wireless SoC chips. You will have full ownership of ATPG architecture, design, implementation, verification, and deployment to Silicon testing, collaborating with Test engineers. Your duties will also involve MBIST design, implementation, and verification for all memories in the SoC. You should be capable of generating and debugging DFT patterns on the tester. You will work closely with the design, design-verification, and backend teams to facilitate the integration and validation of the test logic in all phases of the design and backend implementation flow. To excel in this role, you are required to have 8-10 years of experience and ...

As part of the ASIC modeling team, you will be responsible for developing, maintaining, and testing the NAND/SoC models using C/C++/SystemC. The SoC models aim to accurately capture the functionality of the controller chip that oversees the NAND storage. You should have 4 to 7 years of experience and possess expertise in DFT implementation and verification. Additionally, experience in MBIST implementation and verification, along with a strong grasp of DFT/MBIST fundamentals, is essential. You will be involved in tasks such as DRC Clean up, coverage improvement, and modifying MBIST algorithms. It would be beneficial to have knowledge in PERL/TCL Scripting/Python and using assertions for monit...

We are seeking a highly experienced Senior DFT Engineer with 8+ years of hands-on expertise in developing and implementing DFT architectures for complex SoCs. The ideal candidate should have a solid background in scan insertion, ATPG, BIST, and silicon debug. Key Responsibilities: Define and implement DFT architecture for digital and mixed-signal SoCs Perform scan insertion, boundary scan, and ATPG pattern generation Integrate Memory BIST (MBIST) and Logic BIST (LBIST) Drive DFT verification and post-silicon validation/debug Collaborate with RTL, synthesis, STA, and backend teams to ensure testability Ensure high test coverage, test time optimization, and compliance with ATE requirements Req...

Lead the deployment of Synopsys DFT technologies across key customer projects Act as the primary point of contact, facilitating smooth communication with customers and internal teams Define and manage project schedules, tracking milestones, and deliverables Identify potential risks early, escalate issues as needed, and ensure timely resolutions Ensure projects meet schedule, quality, and customer satisfaction benchmarks Collaborate with AE and R&D teams to meet technical and functional objectives Manage multiple project executions, ensuring seamless alignment with business goals Prepare and deliver progress updates and technical presentations to stakeholders The Impact You Will Have: Guarant...