874 Design Verification Jobs - Page 30

Qualifications and Preferred Skills BS, MS in Electrical Engineering, Computer Engineering or Computer Science 8+ years and current hands-on experience in block-level/IP-level/SoC-level verification. Proficiency in Verilog, System Verilog . Familiarity with industry-standard EDA tools for simulation and debug. Deep experience with UVM-based test benches. Experience with modern programming languages like Python . Knowledge of Arm AMBA protocols such as AXI, APB, and AHB. Understanding of Arm CHI protocol is a plus. Experience on working with IPs for caches, cache coherency, memory subsystems, interconnects and NoCs. Experience with formal verification techniques, emulation platforms is a plus...

Design and development of Chassis Structures such as frame rails, cross members, multi-function brackets, installation of driveline components on Chassis. Delivers value through creation of design concepts by balancing of cross functional needs, collaborating with suppliers to co-develop product solutions. Work closely with colleagues in different Volvo Group global sites, cross functional teams to develop the system and its parts. Development of vehicles structures based on BEV / ICE / alternate energy propulsion systems. Carryout vehicle packaging, durability verification and physical validation needs. Come up with optimized design solutions while working with FE simulation analysts. Work ...

Transport is at the core of modern society. Imagine using your expertise to shape sustainable transport and infrastructure solutions for the future? If you seek to make a difference on a global scale, working with next-gen technologies and the sharpest collaborative teams, then we could be a perfect match. We value your data privacy and therefore do not accept applications via mail. Who we are and what we believe in We are committed to shaping the future landscape of efficient, safe, and sustainable transport solutions. Fulfilling our mission creates countless career opportunities for talents across the group s leading brands and entities. Applying to this job offers you the opportunity to j...

RTL engineers: (5-15 years of experience) - SoC Design engineer with experience working on SOCs based on ARM Architecture DV engineers : - SOC Verification Experience on ARM Ecosystem - PCIE Experience and also PCIE-VIP usage experience

Design Verification Engineer (5 to 12 Years) SoC/IP Verification Company: ACL Digital (Wafer space Semiconductor) Location [Bangalore/Pune] Experience: 5 t o 12 Years Openings: 8 Positions Preferred - Immediate to 45 Days (Notice Period) Job Location: ACL Digital is hiring experienced Design Verification Engineers to work on leading-edge processor-based SoCs and IPs. Notice Period-Prefer less Notice period or serving. Strong understanding of design verification methodologies (UVM, SV, etc.) Experience with industry-standard protocols (AXI, DDR, PCIe, etc.) Familiarity with ASIC and SoC design flows. Proficiency in scripting languages (Python, Perl) Experience with simulation tools and debugg...

An RTL Design Verification Engineer role in our Security IP (SECIP) development team, where a large number of individual embedded micro-processor (MP) subsystems and associated hardware accelerators vital to improve subsystems performance and functionality are designed and verified. These subsystem IPs provide high performance functions to System on Chip (SoC) products across all AMD business units such as client computers, servers, discrete graphics, and gaming. Our verification engineers will work on block level functional verification and its closure, and/or on subsystem level integration and verification for a variety of embedded MP subsystems. Your expertise will impact security policy ...

VERIFICATION LEAD – IP VERIFICATION SmartSoC is looking for a smart and enterprising leader with expert knowledge in IP Verification to come and technically lead a Team. We are looking for someone who is very strong technically and very good at multi-tasking as your role will involve leading 7 to 8 projects at one time. You will be responsible for leading and managing a team, client communication, and project execution. This role will include- Lead an internal IP Verification team, executing projects for an offshore client Be responsible for Test Planning, Environment Architecture and Project Management of Multiple Projects Guide team members in verifying IP’s and delivering zero bug IP’s Ma...

SENIOR VERIFICATION ENGINEER – SV UVM SmartSoC is looking for smart and enterprisingDesign Verification engineers to come to join us and get an opportunity to do some cutting-edge work and also work in a great environment where work is Always Fun and Exciting. SmartSoCs is currently working on multiple in-house turnkey projects and client site projects and many of our projects involve complete verification from spec to closure including building complete DV environments in SV-UVM. Job Responsibilities- Build SV, SV UVM, OVM based environments. Work with many different networking and other protocols Desired Skills and Experience- 3 to 10 years of experience in IP verification Good experience ...

Who We Are Applied Materials is the global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips- the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world- like AI and IoT. If you want to work beyond the cutting-edge, continuously pushing the boundaries of"science and engineering to make possible"the next generations of technology, join us to Make Possible® a Better Future. What We Offer Location: Mu...

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-8 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC ver...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity ...

Role & responsibilities Develop and implement comprehensive verification plans using industry-standard methodologies (e.g., UVM) Design and write robust verification environments (testbenches) to achieve high code coverage Utilize simulation tools (e.g., ModelSim, Cadence Incisive, Synopsys VCS) to verify RTL functionality Debug and analyze verification failures to identify the root cause of design issues Collaborate with RTL design engineers to resolve functional bugs and ensure design revisions meet verification requirements Participate in code reviews and ensure adherence to verification coding standards Stay up-to-date with the latest verification tools and methodologies 5-7 years of exp...

Responsibilities: SoC integration/scenario/performance verification including CHI, DDRx/LPDDRx, and AI accelerator blocks in RTL. Develop test plans, SystemVerilog/Verilog testbenches, and C-based embedded tests. Collaborate with cross-functional teams architecture, design, performance, silicon validation, FPGA, and board teams. Plan, track and report verification tasks to management. Skills & Experience Required: Strong knowledge of Verilog/SystemVerilog HDL. Hands-on experience in SoC verification using embedded C/C++/assembly (ARM preferred). Experience in UVM/OVM, emulation, formal verification, UPF/Power-aware verification. Expertise in GLS, DFT/DFD, CDC (Clock Domain Crossing). Familia...

Role & responsibilities As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the design verification and bring-up of the SoC by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test benches, test harnesses, while interacting with the extended team. You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware and Software Engineering, to create a multi-model SoC that enables development of world-class hardware devices. Preferred candidate profile Bachelors/ Masters ...

Position Title: Manager/ Sr Manager Functional Safety, SOTIF Experience: 12 ~ 15 Year(s) Age Limit Educational Qualification B.E / B. Tech Job Role Responsibilities Role: Taking care of Functional Safety and Software Update Team activities. Responsibilities: Management of Functional Safety Management of Software Update team Functional Safety Software Update Consulting and Promoting to each department. Can provide functional safety guidance on feature definition, design, verification and validation measures. Collaboration with Cross-Functional Teams to work closely with other engineering disciplines (such as software, hardware, and mechanical engineers) to ensure safety across the entire syst...

Role: Taking care of Functional Safety and Software Update Team activities. Responsibilities: Management of Functional Safety Management of Software Update team Functional Safety Software Update Consulting and Promoting to each department. Can provide functional safety guidance on feature definition, design, verification and validation measures. Collaboration with Cross-Functional Teams to work closely with other engineering disciplines (such as software, hardware, and mechanical engineers) to ensure safety across the entire system. Collaborate during system development, validation, and verification phases. Perform Confirmation reviews on SOTIF workproducts Prepare assessments based on requi...

Introduction As a Hardware Engineer at IBM, youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in todays market. Your role and responsibilities Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in ...

Engineer must possess strong understanding on SoC Verification. Engineer must be having 5+ Years of Design Verification Understanding. Engineer must be fluent in Verilog, C/C++, SystemVerilog. Design Debugging skill is mandatory.

Engineer must possess strong understanding on IP & SoC Verification with 7+ Years of Design Verification Exp. Must possess string understanding on Verilog, SystemVerilog, C/C++. Must be able to debug the failure and able to narrow down the root cause.

. Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field. . 3-10 years of experience in RTL design and Design Verification implementation for VLSI systems.

Working on Functional Verification of High-Speed PHY IPs for DDRxx, LPDDRxx, PCIex, Display, and HDMI protocol standards. Studying IP/design blocks/Firmware Specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Developing DV/Firmware test benches, test plans, and test cases. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs). Performing simulation, random and focused stimulus generation, and coverage analysis. Collaborating closely with digital designers for debugging and achieving desired coverage. Developing architecture a...

Greeting with HCL Tech! We were looking somebody who is having experience in Design Verification Experience: 4 to 10 Years Location: Kochi Job Description: General verification expertise System Verilog. UVM Understanding of ARM processor based SOCs, AXI / AHB Good knowledge of Processor based C tests for SOC verification (test coding, compilation, loading in TB, failure debug) Strong hands on work experience of test development, simulation along with usage of popular EDA tools Good debug skills – Check that engineer has done reasonable amount of debug in past projects Has logical and methodical approach to debug issues /failures Has used standard tools for debugging, as applicable

Introduction As a Hardware Engineer at IBM, youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in todays market. Your role and responsibilities Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in ...

Role & responsibilities Job Responsibility As the Lead, you will be responsible for developing test plans, testbenches, drivers, monitors and checkers/scoreboard, test cases, coverage analysis and simulation, verify the functionality, performance and other aspects of RTL designs including the block-level and chip/system level, emulation and validation support. You will work very closely with the Architecture, RTL/uArch, and cross-functional teams. Areas of focus: Verification Methodology, Testbenches, drivers, checkers, test plans. Support for emulation, simulators, chip validation. Active interaction with the RTL/uArch team. Job Requirements Experience with block level, cluster level or chi...

ASIC Design Verification Engineer || UVM/System Verilog || Test benches || Exp 4 to 7 years Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully uni...