Design and Verification

**Job Description:** As a **Verification Engineer** at MaxvyTech in Bangalore, you will be responsible for the following key responsibilities: - Utilize your experience in Verilog, SystemVerilog, and UVM to design and develop test plans. - Develop test cases in UVM/SV and C languages. - Demonstrate the ability to work independently to develop drive/monitor code. **Qualifications Required:** - Bachelor's or Master's degree in Engineering, preferably in B.E. or M.Tech. - Proficiency in APB, AXI, and AHB protocols. - Familiarity with MIPI protocol will be an added advantage. - Knowledge of scripting languages such as Perl and Python. If you are looking to join a dynamic team and contribute to cutting-edge projects, MaxvyTech offers a competitive salary of 3 LPA. To apply, please send your resume to jobs@maxvytech.com with the Job Title you are applying for.,