1 Deserializer Architectures Jobs

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8.0 - 12.0 years

0 Lacs

karnataka

On-site

As a Senior Analog Circuit Design Engineer at BLR & HYD location with 8+ years of experience, your role will involve specializing in SerDes architecture for high-speed I/O interfaces like USB, DisplayPort, and PCIe. You will be responsible for designing and validating CDR circuits, CTLEs, Deserializer architectures, and PLLs, playing a key role in developing next-generation PHY IPs for advanced semiconductor nodes. Key Responsibilities: - Design and validate CDR circuits, CTLEs, PLLs, and Deserializer architectures. - Develop next-generation PHY IPs for advanced semiconductor nodes. - Ensure compliance with high-speed interface standards such as USB 3.x/4, DisplayPort, PCIe Gen3/Gen4/Gen5. -...

Posted 4 days ago

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