6.0 - 10.0 years

0 Lacs

karnataka

On-site

The ideal candidate for this role should possess a strong understanding of RTL design and microarchitecture of IPs, with the ability to integrate them into sub-systems and SoCs. Responsibilities include defining the Uarch of SoC IPs, conducting RTL development, and ensuring the quality of RTL through checks such as Clock Domain Crossing (CDC) check, Lint, Design for Testability (DFT), and Low Power Checks. Additionally, the candidate will be involved in RTL synthesis, STA support, and provide pre and post-silicon functional verification support. Collaboration with different domain teams is essential for successful execution of tasks, along with a solid understanding of DDR knowledge. The candidate should hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, coupled with 6-10 years of experience in IP/SoC Design. Proficiency in SoC design and integration for complex SoCs is a prerequisite, while experience in Synthesis and understanding of timing concepts is considered advantageous. Candidates are expected to have knowledge of AMBA protocols such as AXI, AHB, and APB, in addition to expertise in SoC clocking/reset architecture. Strong RTL design and coding skills in Verilog, System Verilog, VHDL, etc., are required, along with experience in micro-architecture and design of digital IPs and subsystems.,

Posted 6 days ago

Apply

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.