20 Custom Layout Jobs

As an Analog Layout Designer, you will be responsible for working independently on block level and chip level Analog layout design while collaborating with the circuit designer and project lead. Your role will require a minimum of 3+ years of hands-on experience in Analog layout, specifically in custom layout of DAC, ADC, Band gap, Regulators, LDOs, etc. Knowledge of finfet technology or exposure to 28nm or below will be considered an added advantage. It is essential to have a full understanding of IC fabrication and reliability issues. Proficiency in tools such as Cadence-Virtuoso, PVS, ASSURA, and Calibre is required. Strong written and verbal communication skills are necessary for effecti...

As an IC Layout Manager at Micron Technology, you will have the opportunity to work with a highly talented and passionate team in India to design IC layout solutions for intensive applications like artificial intelligence and high-performance computing. Your role will involve collaborating with global teams to meet project milestones in a dynamic environment. **Key Responsibilities:** - Lead the development of a Custom layout team to support Micron's global DRAM layout requirements. - Develop Analog and custom layout designs to meet project schedules and milestones. - Train team members in technical skills and foster a healthy team culture. - Communicate effectively with engineering teams in...

As a Principal Engineer - Analog IP/IC specializing in Semiconductor Chip Design, your role involves leading and coordinating the execution of analog and mixed-signal integrated circuit development projects. You must possess a strong technical background in analog design, verification, and physical implementation, along with exceptional project management skills. Your responsibilities will include: - Designing analog/mixed-signal blocks such as ADC/DAC, PLL, LDO/DCDC, IO, Motor & Gate Drivers. - Running MATLAB modeling, circuit simulations, and post-layout analysis (LPE, Monte Carlo). - Developing and managing verification plans, mixed-signal simulation, and behavioral models. - Guiding cust...

Dear Candidate's find the below details & JD Experience: 3-5 years Notice period: immediate - 15 days Location: Hyderabad interview: 2-3 rounds Job Description: - Develop standard cell layouts and detailed drawings from schematics - Perform physical verification and layout optimization - Collaborate with design engineering and CAD teams - Ensure design rules, yield, and reliability requirements are met. - Expertise in Cadence tools, including Virtuoso and Caliber - Strong understanding of layout fundamentals and physical verification - Excellent problem-solving and communication skills. Interested Designers can share their Updated resume at kalyanreddy.k@acesoftlabs.com Note: matching profil...

Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Excellent problem-solving skills in physical verification of custom layout. • Demonstrate high quality and accurate execution to meet project schedule/milestones in multiple project environment. • Ability to guide junior team-members in their execution of Sub block-level layouts & review critical items. • Co...

Role & responsibilities Description : 4 to 8 years of experience in Design and development of critical analog, mixed-signal, custom digital block. TSMC 16/12nm,7nm,5nm,3nm and below (foundries are also fine like Intel, Samsung, GF) Preferably TSMC 5nm/3nm experience. Responsible full chip level integration support. Verification flows - LVS/DRC/DFM/Antenna check/EMIR experience. Responsible for on-time delivery of block-level layouts of acceptable quality. Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. Analog blocks like Regulators/Charge pumps/Power Management etc.. HBM experience is an added advantage. PLs share resumes/CV to pradeep.b@acesoftlabs.com Preferred c...

Role & responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Excellent problem-solving skills in physical verification of custom layout. Demonstrate high quality and accurate execution to meet project schedule/milestones in multiple project environment. Ability to guide junior team-members in their execution of Sub block-level layouts & review critical...

We are looking for an experienced IO Layout Engineer to join our team in Bangalore. The role involves custom IO layout design, optimization, and sign-off at advanced technology nodes. Responsibilities: Create and optimize IO circuit layouts including ESD structures and analog IOs. Perform floor planning, placement, routing, and parasitic extraction. Ensure DRC, LVS, ERC compliance using industry-standard tools. Collaborate with circuit and verification teams for sign-off. Automate layout flows using scripting for better productivity. Required Skills: 3-8 years in IO / Custom Layout. Strong knowledge of Cadence Virtuoso and Calibre/Assura verification. Experience with advanced nodes (28nm & b...

Expertise in working on memory layout design for advanced nodes (TSMC 3nm, 5nm,), including FinFET architecture and challenges such as variability and manufacturability Expertise in working on address process-dependent effects like electro-migration (EM), IR drop Expertise in optimizing layouts for yield enhancement and manufacturing robustness Expertise in performing debugging of silicon failures and identify layout-related issues Create detailed and optimized physical layouts for memory cells, arrays, and peripheral circuits using tools like Cadence Virtuoso or Synopsys Custom Compiler Perform parasitic extraction and ensure compliance with DRC (Design Rule Check) and LVS (Layout Versus Sc...

Expertise in working on memory layout design for advanced nodes (TSMC 3nm, 5nm,), including FinFET architecture and challenges such as variability and manufacturability Expertise in working on address process-dependent effects like electro-migration (EM), IR drop Expertise in optimizing layouts for yield enhancement and manufacturing robustness Expertise in performing debugging of silicon failures and identify layout-related issues Create detailed and optimized physical layouts for memory cells, arrays, and peripheral circuits using tools like Cadence Virtuoso or Synopsys Custom Compiler Perform parasitic extraction and ensure compliance with DRC (Design Rule Check) and LVS (Layout Versus Sc...

Qualcomm India Private Limited is seeking a Layout Engineer to develop block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. As a Layout Engineer, you will apply your understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. You will conduct analyses, tests, and verify designs using different tools and techniques to identify and troubleshoot issues, staying abreast of new verification methods. Collaboration with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues will be a ke...

We are in search of Salesforce Developers who possess a solid understanding of Apex, VisualForce, SOQL, and SOSL. Proficiency in Triggers, Workflows, ProcessBuilder development, batch jobs, custom objects, custom layout, test coverage, and Salesforce app development is essential. Your role will involve designing and coding solutions to address technical issues, crafting well-structured code, and engaging with clients. To be considered for this position, you should meet the following requirements: - 1 to 4 years of relevant experience - Completed a regular B.Tech. or MCA program - Demonstrated expertise in Salesforce development - Proficiency in object-oriented programming and MVC - Strong co...

You will be responsible for designing and developing critical analog, mixed-signal, custom digital blocks, and providing full chip level integration support. Your expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is crucial for this role. You will be required to perform layout verification tasks such as LVS/DRC/Antenna checks, quality assessments, and support documentation. Ensuring the on-time delivery of block-level layouts with high quality is a key aspect of your responsibilities. Your problem-solving skills will be essential for the physical verification of custom layouts. It is important to demonstrate precise execution to meet project schedules and milestones in a multi-...

As an IC Layout Manager at Micron Technology, you will have the opportunity to lead a dedicated team in India focused on designing IC layouts for cutting-edge applications such as artificial intelligence and high-performance computing solutions like High Bandwidth Memory. Your role will involve collaborating with teams across Micron's global network to ensure the timely delivery of multiple projects. Your responsibilities will include building and developing a custom layout team to support Micron's DRAM layout requirements, overseeing the development of analog and custom layouts, and training team members in technical skills. Effective communication with engineering teams in different countr...

As an IC Layout Manager at Micron Technology, you will have the opportunity to work with a talented core team based in India, focusing on designing IC layouts for applications such as artificial intelligence and high-performance computing solutions, including High Bandwidth Memory. Your role will involve collaborating with global teams to ensure the successful completion of multiple projects within scheduled milestones. Your responsibilities will include: - Building and growing a Custom layout team to support Micron's global DRAM layout requirements. - Developing Analog and custom layout designs to meet project schedules and milestones. - Training team members in technical skills and fosteri...

Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Excellent problem-solving skills in physical verification of custom layout. • Demonstrate high quality and accurate execution to meet project schedule/milestones in multiple project environment. • Ability to guide junior team-members in their execution of Sub block-level layouts & review critical items. • Co...

Company Overview Connectpro operates in the human-resources industry, specializing in recruitment and talent acquisition. Role And Responsibilities As a senior analog design engineer at Connectpro, you will be responsible for taking a subsystem of analog design through all phases of the design process. This includes: Creating the architecture of the analog subsystem Providing technical leadership to the team during execution Designing, simulating, and supervising the layout and verification processes Evaluating and debugging silicon samples You will be working with the latest Cadence analogue design tools including Virtuoso Composer, Verilog, HSPICE, and other PC-based tools like Matlab. The...

Job Specs : We are seeking a highly skilled and motivated Analog Circuit Designer to join the offshore development teams of our group companies. You will work with the rapidly expanding team which focuses on the research and development of Analog / Mixed Signal IPs for Silicon Lifecycle Management, driving innovation and excellence in chip design and verification. You will work alongside a talented and dedicated group of engineers, all committed to pushing the boundaries of technology and delivering top-notch solutions to our customers. Desired Profile : Bachelor's / Master's degree in engineering from EEE / E&C with 4+ Years of work expertise in mixed-signal or CMOS circuit design Expertise...

Greetings from ||Thundersoft|| We are looking for Cutsom Layout engineers with an exposure of Custom layout and having experience in GF 22nm FDSOI technology node

B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Engineering. Expertise in Analog Layout design Expertise in planar technology node / higher node 180 nm is mandatory Expertise in EMIR analysis, ESD, antenna and related layout solutions Knowledge of advanced technology nodes (7nm & below) Good understanding of advanced semiconductor technology process and device physics Full-custom circuit layout/verification and RC extraction experience Familiar with Cadence Virtuoso environment and various industry physical verification tools (DRC,LVS,DFM) Expert level proficiency (Oral + Written) in Chinese language is mandatory incase Beijing, Taiwan and Vietnam are the preferred work locati...