SoC Design Verification Capgemini Technology Services India Limited

5.0 - 10.0 years

4 - 20 Lacs

bengaluru, karnataka, india

On-site

Experience: 510 years in SoC Verification withexpertisein CPU DV and Bus Interconnects. Responsibilities: Perform SoC DV and CPU DV for complex architectures. Develop scalable test benches (BFM, Scoreboard, Checkers, Monitors) inSystemVerilogand UVM. Create tests, functional coverage models, andSystemVerilogassertions. Debug issues related to memory architecture (DRAM, Cache, MMU), AXI, PCIe, DDR/HBM. Collaborate with design teams to ensure verification completeness. Technical Skills: Excellent in SystemVerilog (SV) and UVM. Strong knowledge of AMBA protocols, ARM v8/v9, RISC-V, x86 architecture. Proficient in OOP/C++, Python scripting. Excellent debugging skills.

Posted 3 days ago

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Senior Design Verification Engineer ThunderSoft India Private Limited

7.0 - 10.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Experience : 7-10 years Number of Positions : 3 Role and Responsibilities : Individual contributor role with ability to perform assigned DV tasks independently Collaborate with other team members to perform DV activities. Skills and Qualification : Domain : CPU/Cache Coherency ,PCIe , SoC DV, CPU DV, NoC/NIC(Interconnects) , DDR/HBM Demonstrate a solid understanding of the CPU/CPU Based SoC Verification. Must have good understanding of one or more of the following domains o ARM v8/v9, RISC-V, x86 Architecture o Memory Architecture(DRAM, Cache, MMU), GIC, SoC Debug Architecture o Cache Coherent Architectures o PCIe OSCI Layer and its functionality o PCIe Phy , Bring up and trainin o SoC DV, B...

Posted 1 month ago

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