SoC Static Timing Analysis Engineer, Silicon Google

8.0 - 10.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with Static Timing Analysis, Constraints development and its validation, sign-off corner definitions, process margining, and setup of frequency goals with technology growth and platform development kit (PDK) changes. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science. Experience with a scripting language like Perl or Python. Experience in developing constraints and validating using Timing Constraints Manager (e.g., Synopsys) or TimeVision (e.g...

Posted 6 days ago

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SoC Static Timing Analysis Engineer Google

8.0 - 12.0 years

0 Lacs

karnataka

On-site

As a member of the team at Google, you will play a crucial role in developing custom silicon solutions for Google's direct-to-consumer products, contributing to the innovation that impacts millions globally. Your expertise in electrical engineering or computer science will be instrumental in shaping the future of hardware experiences, focusing on performance, efficiency, and integration. **Key Responsibilities:** - Create design constraints based on architecture/microarchitecture documents, understanding various external IO protocols. - Validate design constraints across multiple corners/modes using Fishtail/Timevision. - Utilize Primetime for running and validating constraints post synthesi...

Posted 1 week ago

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Lead RTL Design Modernize Chip Solutions (MCS)

7.0 - 11.0 years

0 Lacs

karnataka

On-site

We are seeking an experienced RTL Design Engineer to be a part of our advanced ASIC/SoC development team in Bengaluru. As an RTL Design Engineer, you will be responsible for developing high-quality, synthesizable RTL code using Verilog/SystemVerilog and integrating complex IPs and subsystems into high-performance SoCs. Collaboration with system architects, contribution to micro-architecture, and ensuring design quality through checks like Lint, CDC, and Synthesis will be key aspects of this role. Your responsibilities will include leading SoC-level integration activities, providing technical guidance in design reviews, and interfacing with cross-functional teams for smooth bring-up and signo...

Posted 3 months ago

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