FPGA Validation Prototyping Lead JPR Corp

5.0 - 9.0 years

0 Lacs

noida, uttar pradesh

On-site

You are currently seeking a FPGA Validation Prototyping Lead to join our team. As the lead, your responsibilities will include building images for partitions using platforms such as HAPs (Synopsys), ProFPGA platform (Siemens), and other custom FPGA prototype platforms. You will also be involved in RTL porting, constraint generation, debug insertion, and validation using the ProFPGA platform for testing. Additionally, your role will encompass tasks such as firmware stitching, debugging, bring up, boot flow, and ensuring the successful operation of the prototypes. The ideal candidate will have a total work experience of at least 5 years and be proficient in FPGA validation and prototyping processes. This position is full-time and permanent, with work locations available in Bangalore, Hyderabad, Ahmedabad, Pune, Noida, Chennai, and Kochi. In addition to a competitive salary, benefits for this role include cell phone reimbursement, Provident Fund, performance bonuses, and yearly bonuses. If you are a motivated professional with a strong background in FPGA validation and prototyping, we encourage you to apply for this exciting opportunity to join our dynamic team.,

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CPU Staff Physical Design Engineer Qualcomm

6.0 - 15.0 years

0 Lacs

hyderabad, telangana

On-site

Qualcomm India Private Limited is a leading technology innovator that aims to enable next-generation experiences and drive digital transformation for a smarter, connected future. As a Qualcomm Hardware Engineer, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems. This includes working on circuits, mechanical systems, Digital/Analog/RF/optical systems, test systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams is essential to develop solutions that meet performance requirements. To be considered for this role, you should have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field along with 4+ years of Hardware Engineering experience. Alternatively, a Master's degree with 3+ years of experience or a PhD with 2+ years of experience is also acceptable. The ideal candidate should possess strong analytical and technical skills, especially in ASIC design. Responsibilities for this position include participating in ASIC development projects, focusing on Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification. You will be expected to create design experiments, conduct detailed PPA comparison analysis, collaborate with various teams for optimization, and develop Place & Route recipes for optimal PPA results. Qualifications required for this role include 6-15 years of experience in High-Performance core Place & Route and ASIC design Implementation. Preferred qualifications involve extensive experience in Place & Route with FC or Innovus, knowledge of complete ASIC flow with optimization techniques, proficiency in STA using Primetime and/or Tempus, and skills in Perl/Tcl, Python, C++, among others. Problem-solving abilities, experience with CPU micro-architecture, low power implementation techniques, and clock tree implementation techniques are also desired. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If accommodation is needed during the application/hiring process, individuals can contact Qualcomm for support. The company expects its employees to adhere to all applicable policies and procedures, including confidentiality requirements. Staffing and recruiting agencies are advised that only individuals seeking a job at Qualcomm should use the Careers Site. Unsolicited submissions from agencies will not be accepted. For more information about this role, interested individuals can contact Qualcomm Careers directly.,

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Synthesis/STA Semicon TechnoLabs

3.0 - 12.0 years

0 Lacs

karnataka

On-site

You will be joining a leading training institute in the semiconductor industry that is constantly seeking dedicated individuals who are enthusiastic about achieving excellence and eager to expand their knowledge. Our work environment is dynamic, fostering innovation and creativity, and we provide avenues for personal and professional growth through training programs, mentorship, and coaching. The position available is for Synthesis/STA in either Bengaluru or Noida with a requirement of 3-12 years of experience and a BTECH/MTECH qualification. Key Responsibilities: - Demonstrated proficiency in timing concepts and the ability to independently close timing of Block/SoC. - Hands-on experience in generating constraints. - Proficiency in Logical synthesis tools such as Design compiler/ Rc compiler. - Familiarity with Formal Verification and comfortable using LEC/formality tools. - Ability to generate and implement functional Ecos. - Experience in Pre-layout and Post layout timing analysis using industry standard tools like Primetime/ETS. - Hands-on experience in crosstalk timing closure. - Understanding of Path based analysis, AOCV, DMSA is advantageous. - Knowledge of the complete physical Design flow is considered a plus. If you are a self-driven, innovative individual with a strong commitment to excellence, we encourage you to submit your resume and cover letter to our HR department. Be part of our dedicated team of professionals and contribute to the advancement of the semiconductor industry.,

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