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5.0 - 9.0 years
0 Lacs
hyderabad, telangana
On-site
As an Implementation Engineer at Kinara, a Bay Area-based venture backed company, you will play a crucial role in leading and executing Synthesis and Static Timing Analysis (STA) for complex AI SoC designs with multi-mode and multi-power domain functionalities. Your responsibilities will include: - Conducting Synthesis and STA to ensure the quality and reliability of our products - Optimizing designs for low power and high performance with logically equivalent RTL - Implementing ECOs for functional and timing closure - Working with multi-clock, multi-power domain designs and multi-mode timing constraints - Inserting DFT and collaborating with different functional teams like RTL Design, DFT, ...
Posted 3 weeks ago
4.0 - 12.0 years
0 Lacs
karnataka
On-site
Role Overview: You have 12+ years of experience in Digital ASIC/Processor Design with strong fundamentals in core areas such as Microarchitecture, Computer Arithmetic, Circuit Design, and Process Technology. Your communication skills are excellent, enabling you to collaborate effectively with design teams globally. Key Responsibilities: - Lead, train, and mentor a team of junior engineers for a large modem design project in advanced process nodes - Collaborate with RTL, DFT, and PD leads to take a project from Post-RTL to Netlist release, focusing on area, timing, power, and testability - Write timing constraints, conduct synthesis, formal verification, CLP, Primetime, PTPX, and CECO tasks -...
Posted 1 month ago
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