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4 - 8 years
3 - 8 Lacs
Hyderabad
Work from Office
Custom Layout Engineer Experience: 5 to 8 Years Education: BE or MTech in Electronics / VLSI Engineering Role & Responsibilities: Design and develop critical analog and custom digital layout blocks Perform layout verification such as LVS, DRC, Antenna checks, quality checks, and documentation Ensure on-time delivery of high-quality block-level layouts Demonstrate leadership in planning, area/time estimation, scheduling, delegation, and execution to meet project milestones Guide and review sub-block layouts developed by junior team members Contribute to project management activities Communicate effectively with global engineering teams to ensure successful project execution Required Skills & Qualifications: 58 years of experience in analog/custom layout design in advanced CMOS nodes Proficient in Cadence VLE/VXL and Mentor Graphics Calibre (DRC/LVS) Hands-on experience in laying out critical analog blocks such as: Temperature Sensors, PLLs, ADCs/DACs, LDOs, Bandgap References, Reference Generators, Charge Pumps, Current Mirrors, Comparators, Differential Amplifiers Strong understanding of analog layout fundamentals: Matching, Electro-migration, Latch-up, Coupling/Crosstalk, IR-drop, Active/passive parasitic effects Ability to account for layout effects on speed, capacitance, power, and area Excellent problem-solving skills in physical verification of custom layouts Multiple tape-out experience is a strong plus Excellent verbal and written communication skills Preferred (Nice to Have): Strong understanding of memory design methodology Experience with various memory layout levels including: Custom memory bits, Leaf cells, Control blocks, Read/write components, Sense amplifiers, Decoders
Posted 1 month ago
2 - 4 years
4 - 6 Lacs
Hyderabad
Work from Office
Responsibilities will include, but are not limited to: Design, implementation, and improvement of Complex Analog Circuits such as CMOS Amplifiers, Comparators, Bandgap references, V2I converters, LDOs, charge pumps, Oscillators, DLL, IO circuits (DDR/LPDDR), Delays, Process and temperature sensors in advanced semiconductor process nodes for advanced DRAM products Integration of modules with Power delivery network and propose design solution for optimum performance Driving innovation into the future Memory generations within a dynamic work environment Validate & optimize design for reliability (Device stress, Aging effect) EM/IR simulation, optimize layout to achieve best circuit performance Custom digital circuit design & validation Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality Performs semiconductor design engineering assignments including engineering and designing chip layout circuits, circuit checking, documenting specifications, modifying, and evaluating semiconductor devices and components. Reviews product requirements and logic diagrams for device definition. Typically responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor devices and components.
Posted 2 months ago
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