239 Cmos Jobs - Page 7

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers.Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLLAdditional responsibilities:logic (RTL) design, timing closure, CDC analysis etc.Understand and Design Power efficient logic.Agile project planning and execution.RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure syst...

Analog IP development including circuit design, layout, AMS verification, and characterization. Analog IP development Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs,

Your future role Take on a new challenge and apply your engineering expertise in a dynamic and innovative field. Youll work alongside collaborative, forward-thinking, and solution-oriented teammates. You'll play a pivotal role in ensuring the successful introduction of Alstom products during the Product Introduction (PI) period, as well as during commissioning and warranty phases. Day-to-day, youll work closely with teams across the business (such as Quality, Engineering, and Maintenance teams), support technical reviews with suppliers and customers, and much more. Youll specifically take care of diagnosing technical malfunctions and defining troubleshooting methodologies, but also supportin...

As a skilled professional in Standard Cell Library Development, you will leverage your hands-on experience and expertise to contribute effectively to the characterization processes. Your solid understanding of CMOS and FinFET technologies will be key in ensuring the success of the projects at hand. Additionally, exposure to Verilog modeling will be advantageous in this role, although it is not mandatory. Your role will require strong debugging and problem-solving skills specifically related to cell design, SPICE simulation, and characterization. This will enable you to address challenges effectively and ensure the quality of the developed libraries. Proficiency in EDA tools is essential for ...

You will be working as a Semiconductor Domain Consultant for a reputable multinational corporation. Your primary responsibilities will include leveraging your expertise in semiconductor manufacturing processes, chip design, and testing methodologies. You should have a strong understanding of semiconductor technologies such as CMOS, memory devices, RF, power semiconductors, and sensors. Additionally, you will be expected to have experience in semiconductor supply chain management and market analysis. In this role, it is essential to possess excellent communication, presentation, and client relationship management skills. You should be capable of working both independently and collaboratively ...

As a Lead Memory Design Engineer, you will be responsible for driving the architecture, design, and development of advanced memory IPs including SRAMs, ROMs, CAMs, and Register Files. Your role will involve leading a team of designers, collaborating with cross-functional groups, and delivering high-performance, low-power, and silicon-proven memory solutions at advanced technology nodes. Your key responsibilities will include defining architecture and design specifications for custom memory IPs, optimizing circuits such as memory cell arrays, sense amplifiers, and decoders, leading schematic-level design and simulation, collaborating with layout and verification teams, guiding post-layout act...

Analog Layout Engineer Experience3 to 5 Years QualificationB.E / B. Tech / M.E / M. Tech ESSENTIAL DUTIES AND RESPONSIBILITIES: Candidate should have a strong knowledge on devices and process/fabrication technology. Should have work experience in 7nm, 10nm, 14nm, 16nm etc Good understating of Deep Submicron issues and layout techniques. Expertise on matching, parasitic reduction, ESD, DFM etc. Proficiency in use of below EDA tools for full custom layout and post-layout verification DRC/LVS/DFM etc. Cadence Virtuoso Layout editor (L/XL/GXL) Verification toolsAssura/PVS/Calibre/ Hercules Preferred Skills: Scripting Knowledge of perl/shell/skill are highly preferred Job Category VLSI (Silicon e...

Lead Analog Layout Engineer Experience8 to 10 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: Candidate should have a strong knowledge on devices and process/fabrication technology. Should have work experience in 7nm, 10nm, 14nm, 16nm etc Good understating of Deep Submicron issues and layout techniques. Expertise on matching, parasitic reduction, ESD, DFM etc. Proficiency in use of below EDA tools for full custom layout and post-layout verification DRC/LVS/DFM etc. Cadence Virtuoso Layout editor (L/XL/GXL) Verification toolsAssura/PVS/Calibre/ Hercules Ability to handle a team Preferred Skills: Scripting Knowledge of perl/shell/skill are highly preferred...

Job Description • M emory layout engineer. • Experience Level 3 to 8 Years ( Mid-Level Role) Responsibilities: As Memory Layout Engineer, we will work on developing memory compilers layouts and memory Fast Cache instances layouts for our next generation Cores achieving outstanding PPA. Required Skills and Experience : We Prefer graduate or postgraduate from a University or Engineering School, in Electronic Engineering or equivalent Engineering Degree. We expect you to have basic understanding of CMOS Transistors, their behaviors. We expect some basic understanding of CMOS logic design and layout. Understanding of Power versus Performance versus Area trade-offs in typical CMOS design. You hav...

You will be responsible for the layout of Analog and mixed-signal modules in CMOS and Power Technologies, with a specific focus on DC-DC converters for power management ICs. This includes designing Analog and mixed-signal system resource blocks such as POR, Bandgap, LDO, Oscillator, amplifier, and power FET. You will also be involved in chip floor-planning, pad ring layout, power busing, bonding, and tape-out activities. Your role will require a deep understanding of layout verification processes like DRC, LVS, Latch-up, and Electro-migration. Additionally, you will collaborate closely with designers to define block layout requirements, match patterns, and ensure signal integrity. To qualify...

You will be joining Tata Electronics Private Limited (TEPL), a greenfield venture of the Tata Group specialized in manufacturing precision components. As a subsidiary of Tata Sons Pvt. Ltd., TEPL is at the forefront of establishing India's first AI-enabled state-of-the-art Semiconductor Foundry. This cutting-edge facility is dedicated to producing chips for various applications including power management IC, display drivers, microcontrollers (MCU), and high-performance computing logic to cater to the increasing demands in sectors such as automotive, computing, data storage, wireless communications, and artificial intelligence. Your primary responsibilities will revolve around the integration...

Role & responsibilities JD: Advanced memory layout design (SRAM, ROM, custom) Hands-on with FinFET, Virtuoso, Calibre, PVS Tight collaboration with circuit & verification teams Mastery in DRC/LVS, parasitic optimization, and layout efficiency Experience with foundry tech files and tapeout is a huge plus!

You will be part of a big MNC as a Semiconductor Domain Consultant, responsible for utilizing your expertise in semiconductor manufacturing processes, chip design, and testing methodologies. Your role will require a strong understanding of semiconductor technologies such as CMOS, memory devices, RF, power semiconductors, and sensors. Additionally, you will need experience with semiconductor supply chain management, market analysis, and knowledge of industry standards, regulations, and certifications. Your responsibilities will include effective communication, presentation, and client relationship management. You should be able to work both independently and collaboratively as part of a team....

Good communication skills, Should have exposure of VLSI teaching. Knowledge of advance digital design, Verilog, System Verilog, VHDL, FPGA, CMOS. Hands on experience with industry Standard Tools Having experience of min 3 years in relevant field.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role & responsibilities: Outline the day-to-day responsibilities for this role. Preferred candidate profile: Specify required role expertise, previous job experience, or relevant certifications.

Job Title: AI/ML Engineer - Time Series Forecasting & Clustering Location: Bangalore Experience: 2+ Years Job Type: Full-Time Mandatory Skills: AI/ML Engineer with Time Series Forecasting & Clustering experience Responsibilities in Brief: Time Series Forecasting : Build models to predict trends from time series data. Clustering : Develop algorithms to group and analyze data segments. Data Insights : Analyze data to enhance model performance. Team Collaboration : Work with teams to integrate models into products. Stay Updated : Apply the latest AI techniques to improve solutions. Qualifications: Education : Bachelors/Masters in Computer Science or related field. Experience : Hands-on experien...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: In this highly cross functional role, you will be part of the Global Design Enablement team responsible for various aspects of PDK development across Custom, Analog and RF technology nodes. As a member of the CAD team, you will be working closely with Custom, Analog & RF Engineering design community to develop & support customized tools and flows for Schematic & Layout design, Circuit Simulation, IP characterization, Custom/Analog P&R and transistor-level EM/IR flows. You will also have the responsibility to collaborate with our Foundry and EDA partners to deploy best-in class EDA tools and flows in additi...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

90/130/150nm and higher node with PMIC layout experience. Performs layout and takes corrective actions in such a way that the final result meets all requirements as stated in the Design document, section layout, including all remarks from review, the customer and back annotation. Performs layout in such a way that the final result meets all general layout guidelines and matches 1-to-1 with parameter devices and hierarchy used in simulations. Create floorplan Performs DRC and takes corrective actions if needed until DRC is error free Performs LVS and takes corrective actions if needed until result is successful Performs layout in such a way that final result meets the foundry layout rules. Pr...

Design and develop RF and analog circuits such as LNAs, mixers, power amplifiers, VCOs, PLLs, and ADC/DACs. Perform system-level analysis to optimize RF performance parameters like gain, noise figure, linearity, and phase noise. Conduct circuit simulations using tools like Cadence Spectre, ADS, HFSS, Momentum, and EMX. Collaborate with layout engineers to ensure optimal floorplanning, parasitic extraction, and RF routing. Conduct post-layout verification and EM simulations for high-frequency designs. Participate in lab validation and characterization of fabricated ICs, debugging issues, and improving performance. Work closely with system architects and digital design teams for mixed-signal i...

Lead the design, development, and verification of RF and analog IC blocks, including LNAs, mixers, power amplifiers, PLLs, VCOs, and ADC/DACs. Drive system architecture decisions for RF front-end and transceiver designs. Guide and mentor junior engineers, ensuring high-quality design practices. Perform top-level integration, ensuring seamless connectivity and performance of RF, analog, and mixed-signal circuits. Oversee simulation, layout reviews, and post-layout verification, optimizing for performance and manufacturability. Collaborate with layout, test, and product engineering teams for silicon validation and characterization. Define and execute design methodologies for efficiency, robust...

Lead and manage the analog and RF layout team for high-performance semiconductor products Oversee layout planning, floorplanning, and routing for RF, analog, and mixed-signal IC designs. Work closely with circuit design teams to optimize layouts for performance, area, and manufacturability. Ensure DFM (Design for Manufacturability), DRC (Design Rule Check), LVS (Layout vs. Schematic), and EM (Electromigration) compliance. Drive automation and layout methodologies to improve efficiency and quality. Collaborate with foundry partners for process design kits (PDKs), layout guidelines, and tape-out requirements. Provide technical mentorship to layout engineers and review critical blocks. Own full...