239 Cmos Jobs - Page 5

General Summary: We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries from automotive to health care, from smart cities to robotics we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design Digital ASIC Design Design/SOC Verification CAD Solution Engineer ...

As an Integration Engineer, you will be responsible for managing the integration of 40-110nm BCD (BCD Lite) and HV (Display Driver) technologies from partner facilities. Your main objective will be to ensure the transfer of technologies while meeting performance, reliability, yield, schedule, and cost targets. Additionally, you will be required to support the initial ramp-up phase while upholding yield and quality metrics. Your role will also involve enhancing existing technologies by adding features like active devices and passives, as well as developing new technologies to improve performance and expand application range. You may also lead Wide Band Gap Power technologies as part of your r...

You should have an M.S or PhD in Electrical Engineering, Materials Science or equivalent field. You must possess a strong understanding of CMOS and eNVM device physics, process modules, yield improvement, failure mechanisms, and analytical techniques (physical and electrical). A deep understanding of key eNVM technologies such as charge trap, floating gate, RRAM, MRAM, etc is essential. Experience in technology parameters and figures of merit like bit cell size, macro size, endurance, retention, power, latency, mask count, etc is required. You should have a proven track record in delivering these technologies into volume manufacturing and achieving competitive performance. The ability to lea...

Role & responsibilities Description: Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Excellent problem-solving skills in physical verification of custom layout. • BE or MTech in Electronic/VLSI Engineering • 4 + year experience in analog/custom layout design in advanced CMOS process. ##NOTE: **custom layout or analog layout with TSMC 3nm/5nm7nm & 5+ exp *...

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Timing models for AMS macros in multiple f...

As a member of Tata Electronics, a subsidiary of Tata Sons Pvt. Ltd., you will be part of a pioneering initiative to establish India's first AI-enabled state-of-the-art Semiconductor Foundry. This cutting-edge facility is dedicated to producing chips for a variety of applications, including power management IC, display drivers, microcontrollers (MCU), and high-performance computing logic. These chips cater to the increasing demands of sectors such as automotive, computing, data storage, wireless communications, and artificial intelligence. Your role will involve integration responsibilities for the transfer of 28-90nm technologies from partner facilities, focusing on feature enhancements and...

Job Description: Role and Responsibilities: Develops and prepares stdcells layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. Checks dimensions, writes specifications, and verifies completed drawings, artwork or digitized plots. Check design layouts and detailed drawings. 3-5 years of experience. Qualification/Requirements: Must have 3-5 of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments. Should be abl...

The role of Memory Circuit Design Engineer at Synopsys India Pvt Ltd is a full-time position suitable for individuals with 2 to 6 years of relevant experience. The position is based in Bengaluru with the flexibility of working partially from home. As a Memory Circuit Design Engineer, you will be tasked with the design, optimization, and verification of memory circuits. Collaboration with cross-functional teams is an essential aspect of this role to ensure that the memory designs adhere to industry standards. Your responsibilities will also include circuit simulation, analysis, debugging, and documentation. To excel in this role, you should possess strong skills in Memory Circuit Design, Circ...

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

As an Analog Layout Design Engineer at Synopsys, you will play a pivotal role in developing cutting-edge layouts for next-generation DDR/HBM/UCIe IPs. Your primary responsibilities will include creating floorplans, routing, and conducting physical verifications to ensure high-quality deliverables that meet stringent quality standards within specified timelines. You will collaborate closely with design engineers to optimize layouts for performance, power efficiency, and area utilization. By implementing layout matching techniques, ESD, latch-up, EMIR, DFM, and LEF generation, you will contribute to the enhancement of the performance and reliability of semiconductor IPs. Ensuring compliance wi...

As a Principal Analog Design Engineer specializing in New Product Development within Power Management at Onsemi in Bengaluru, India, you will be a crucial member of the team responsible for the advancement of various Power Management products for consumer, industrial, and automotive applications. These products include DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, switches, and e-fuses. Your primary responsibilities in this role will include leading an analog IP block from its definition phase to the delivery of the IP. You will be tasked with evaluating the intermediate and final results of projects both during the design phase and the silicon ...

As a Formulations Scientist located in Hyderabad, India, you will be responsible for developing oral solid dosage forms of both Non-DEA and DEA substances. Your key functions will include conducting Literature Search, Pre-Formulation, and Formulation Design to ensure the development of stable, Bioequivalent, and Manufacturable generic solid oral formulations. Your responsibilities will involve being a mentor and motivator to your team. You will be tasked with developing robust formulations and processes for immediate release and modified release tablet and capsule dosage forms. Additionally, you will evaluate patents, develop non-infringement strategies, and have the capability of developing...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and highly skilled engineer committed to advancing the field of high-speed analog design. You bring a wealth of experience in designing critical analog and mixed-signal blocks, particularly for cutting-edge PCIe 6 and PCIe 7 or SerDes PHY solutions. Your techn...

As a Logic design Engineer in the IBM Systems division, you wi be responsibe for the microarchitecture design and deveopment of features to meet Secure, high performance & ow power targets of the Mainframe and / or POWER customers.Deep expertise in the impementation of functiona units within the core / cache / Memory controer / Interrupt / crypto / PCIE / DLLAdditiona responsibiities:ogic (RTL) design, timing cosure, CDC anaysis etc.Understand and Design Power efficient ogic.Agie project panning and execution.Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required educ...

You will be responsible for executing internal projects or small tasks within customer projects related to VLSI Frontend, Backend, or Analog design with minimal supervision from the Lead. Your role will involve working as an Individual contributor on tasks such as RTL Design, Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. You will be expected to analyze and complete assigned tasks within the defined domain successfully and on time with minimal support from senior engineers, ensuring quality delivery as approved by the senior engineer or project lead. Quality of deliverables is a key focus, requiring clean delivery of modules that are easy to...

Tata Electronics Private Limited (TEPL) is a greenfield venture of the Tata Group with expertise in manufacturing precision components. Tata Electronics (a wholly owned subsidiary of Tata Sons Pvt. Ltd.) is building India's first AI-enabled state-of-the-art Semiconductor Foundry. This facility will produce chips for applications such as power management IC, display drivers, microcontrollers (MCU) and high-performance computing logic, addressing the growing demand in markets such as automotive, computing and data storage, wireless communications and artificial intelligence. Tata Electronics is a subsidiary of the Tata group. The Tata Group operates in more than 100 countries across six contin...

Job Description: Role and Responsibilities: Develops and prepares stdcells layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. Checks dimensions, writes specifications, and verifies completed drawings, artwork or digitized plots. Check design layouts and detailed drawings. 3-5 years of experience. Qualification/Requirements: Must have 3-5 of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments. Should be abl...

We are looking for a highly skilled and experienced Lead Engineer to join our team and contribute to the verification of mixes Signal. The ideal candidate should have a deep understanding of the Cadence, AMS along with expertise in system-level development and debugging What You Will Do Proficient in Verilog-AMS, System Verilog, and UVM methodologies Experience with Cadence Spectre or similar AMS simulation tools Strong understanding of analog circuit design principles (op-amps, transistors, etc.) What You Need to Be Successful Proficient in Verilog-AMS, System Verilog, and UVM methodologies Bonus Points if You Have Experience with Cadence Spectre or similar AMS simulation tools Strong under...

Cadence is looking for Principal Design Engineer to join our dynamic team and embark on a rewarding career journey Health and Safety Compliance: Ensure that construction projects comply with health and safety regulations, guidelines, and industry standards Risk Assessment: Identify and assess potential health and safety risks associated with the project's design, construction methods, and materials Design Coordination: Collaborate with architects, engineers, project managers, and other stakeholders to integrate health and safety principles into the project's design and planning Hazard Identification: Identify and document potential hazards related to the project, including those arising from...

Develop CMOS embedded non-volatile memories such as MRAM and RRAM Design architecture and implement circuits with a focus on high speed, low power, and high-density designs Perform schematic entry, circuit simulation, layout planning, layout supervision, design verification, and validation Interface with CAD and Frontend engineers for memory compiler automation, EDA model generation, and full verification flow Perform design verification and drive physical layout design and verification Provide support and perform other duties as assigned The Impact You Will Have Contribute to the development of high-performance silicon chips and supporting software content Enhance the efficiency and perform...

What You'll Be Doing Develop CMOS embedded non-volatile memories, including MRAM and RRAM. Design architecture and implement circuits focused on high speed, low power, and high density. Perform schematic entry, circuit simulation, layout planning, layout supervision, and design verification. Interface with CAD and Frontend teams for memory compiler automation, EDA model generation, and verification flows. Drive physical layout design and verification processes. Provide technical support and perform other tasks as required. The Impact You Will Have Contribute to the development of high-performance silicon chips and memory-related software. Enhance the efficiency and performance of CMOS non-vo...

Desired Skills: In depth familiarity with layout of analog and mixed signal CMOS circuits Exposure to Analog/Mixed Signal circuit layout (i.e RX, TX, PLL, etc..) Familiarity with Custom digital layout (i.e high speed logic paths) Aware of layout techniques to mitigate ESD, latchup Knowledge of layout effects (like matching, proximity effects etc) Knowledge of design for reliability (i.e EM, IR etc..) Knowledge of rules for advanced technology nodes across multiple foundries (SEC, TSMC, GF, Intel) Knowledge of DFM Rules for advanced technology nodes (16nm and below) Strong debugging, analytical and trouble shooting skills Excellent documentation and communication skills

You are a passionate and skilled Analog Layout Design Engineer with a keen eye for detail and a deep understanding of advanced semiconductor technologies You thrive in dynamic environments and possess a strong problem-solving aptitude With a profound expertise in developing high-quality layouts and physical verification techniques, you are ready to contribute to cutting-edge DDR/HBM/UCIe IP development You excel in collaboration, fostering accountability and ownership within teams, and have excellent written, verbal communication, and interpersonal skills Your commitment to diversity and inclusion aligns with Synopsysvalues, and you are eager to work in an environment that welcomes all persp...

What You ll Need: BTech/MTech in Electrical Engineering or related field. Minimum of 3 years of experience with MTech or 5 years with BTech in CMOS circuit design and layout methodology. Strong knowledge of deep submicron process technologies and CMOS processes. Familiarity with JEDEC requirements for DDR interfaces and standards. Experience with ASIC design flow and ESD concepts is an advantage.

General Summary Qualcomm is a company of inventors revolutionizing the CPU market in an age of innovation. As an SRAM Mask Layout Designer , you will be part of a high-performance CPU team, collaborating with top engineering talent to deliver designs that push the limits of performance, energy efficiency, and scalability. This role offers a dynamic and creative environment, with opportunities to impact next-generation products used around the world. In this role, you will develop block or macro-level layouts and floorplans for high-performance custom memories, ensuring alignment with design schematics and project requirements. You will apply industry best practices, work with cutting-edge te...