239 Cmos Jobs - Page 3

Company Description Thalia is a venture-funded technology business with facilities in Cwmbran, United Kingdom; Hyderabad, India; and Cologne, Germany. The company provides analog and mixed signal design solutions for integrated circuit (IC) manufacturers and IP companies utilizing unique design automation technology and strong value-added services capabilities. With support from investors like Mercia Fund Management and Finance Wales, along with grants from Innovate UK and The Welsh Government, Thalia enables customers to migrate designs, generate portfolios, and develop faster IPs, achieving reduced design cycles, lower costs, and shorter time to market. Thalia has successfully delivered nu...

Job Title: VLSI Verification Engineer Experience: 1 to 3 years Location: Hyderabad Job Description: We are seeking a highly motivated VLSI Verification Engineer with hands-on experience in circuit simulation, gate-level verification, and schematic analysis . The candidate will work on SPICE-based simulations, GLS with SDF back annotation, and transistor-level debugging to ensure design quality and sign-off readiness. Key Responsibilities: Develop, understand, and analyze block-level & memory schematics. Perform SPICE simulations (DC, transient) and correlate with gate-level models. Conduct gate-level simulations with SDF back annotation. Debug annotation issues, timing violations, and GLS fa...

Role Overview: You will be working as an Analog and Mixed Signal Design Engineer in the Reference design team at GlobalFoundries" Bangalore office. Your main responsibilities will include designing, simulating, and verifying analog circuit design blocks such as BGR, LDO, OTA, and Current mirrors with a focus on quality and minimal cycle time. Key Responsibilities: - Have a solid foundation in Analog and Mixed signal circuit design in advanced silicon technologies - Support silicon bring-up and characterization - Participate in implementation & design/layout reviews - Contribute innovative ideas for addressing design problems Qualifications Required: - MTech or PhD from top-tier institutes - ...

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

We are looking for a skilled SAP DRC Consultant with 19 years of experience to join our team at Forward Eye Technologies. The ideal candidate will have a strong background in SAP DRC and be able to work effectively in a fast-paced environment. Roles and Responsibility Collaborate with cross-functional teams to design and implement SAP DRC solutions. Provide technical expertise and support for SAP DRC projects. Develop and maintain documentation for SAP DRC implementations. Troubleshoot and resolve complex technical issues related to SAP DRC. Conduct training sessions for end-users on SAP DRC functionality. Work closely with stakeholders to understand business requirements and develop solutio...

Will define circuit requirements and complete design from schematic, layout, and verification to characterization Completion of circuit layout and/or define layout requirements for a mask designer Write specification and test requirements documentation Behavioral modeling of analog and digital circuits. Complete mixed-signal simulations for verification of chip level and system-level performance Qualifications: Ph.D. with a strong analog design background Excellent mixed-signal circuit design knowledge and skill IC design background, in-depth knowledge of deep sub-micron silicon processes, manufacturing mixed-signal design flow Extensive experience using Cadence or equivalent circuit design ...

As a Senior Logic Design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performanc...

BE/B.Tech /ME/M.Tech 4 years to 8 years He/She should be able to act as focal point with customers, work and lead a team of 3-4 customlayoutengineers onanaloglayout, physical verification, maintaining PDKs, ealuating them. The candidates should have a strong expertise in some criticallayouts such as PLL, DLL, LNA, VGA, ADC, LDO. He/She should be able to adapt to new technologies/tools/flows pretty quickly. Expertise in CustomLayoutStandard Cells, I/O or specialanalogdesigns such as RF transceivers, LNA, VGA, PLL, DLL, LDO, Bandgap, VCO, ADC,DAC. StrongLayoutDesign Concepts. Experience in Pcell development, maintaining and modifying PDKs. Experience inLayoutDesign tools such as Virtuoso, Virt...

As a skilled Analog/Mixed Signal Circuit Designer, you will be responsible for defining microarchitecture and implementing various innovative analog/mixed-signal blocks. Your role will involve delivering detailed specifications, developing circuit schematics, and collaborating with cross-functional teams to drive designs to completion. Additionally, you will have the opportunity to mentor and supervise junior engineers to ensure high-quality execution. Key Responsibilities: - Define microarchitecture and design/implement various innovative analog/mixed-signal blocks - Deliver detailed specifications & documentation - Develop circuit schematics and collaborate with layout designers for design...

Role Overview: As a Formulations Scientist in Hyderabad, India, you will be responsible for the development of oral solid dosage forms of Non-DEA and DEA substances. Your key functions will include conducting Literature Search, Pre-Formulation, Formulation Design, and Development of stable, Bioequivalent, and Manufacturable generic solid oral formulations. Key Responsibilities: - Act as a mentor and motivator to the team. - Develop robust formulations and processes for immediate release and modified release tablet and capsule dosage forms. - Evaluate patents and develop non-infringement strategies, including the capability of developing Paragraph IV products. - Scale-up and optimize manufact...

Must have experience in working with MNC clients Must be good at Honouring Committed Schedules, Quality delivery, Clarity in Communication Familiarity with Serdes components like serializer or de-serializer circuits Strong fundamentals and knowledge of AMS design flow Must have familiarity with layout issues, working with layout team to fix them Must be good at preparing the Review PPT, run through the review meeting and closing all action items Must ensure the design meets PPA goals Good at debugging to ensure meeting all performance simulation issues Must be able to pass QA checks as demanded by the client Must be able to generate all relevant design views using sign-off tools Qualificatio...

Roles and Responsibilities Design analog layouts using Cadence Virtuoso for FinFET devices with PLL and SerDes interfaces. Perform DRC, LVS, and mixed signal simulations to ensure design integrity. Collaborate with cross-functional teams to resolve design issues and optimize designs. Develop expertise in Caliber technology for high-speed I/O applications. Ensure compliance with industry standards and company guidelines.

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

Semiconductor Device Physicist Job Title: Semiconductor Device Physicist Location: [Corporate R&D / Process Development Labs] Experience: 3-10 years Education: Ph.D. in Semiconductor Physics, Electronics, or Materials Science Responsibilities: Model and analyze semiconductor devices (FinFET, GAA, TFET, etc.) at nanometer nodes Support process and device teams with TCAD simulations (Synopsys Sentaurus, Silvaco) Investigate novel device structures for performance and reliability Generate physical models for use in EDA/PDK development Requirements: Strong understanding of semiconductor physics and advanced CMOS/More-than-Moore technologies Experience with TCAD tools and device measurement techn...

Process Integration Engineer Semiconductor Job Title: Process Integration Engineer Location: [R&D Fab / Commercial Fab] Experience: 2–6 years Education: M.Tech or Ph.D. in VLSI, Microelectronics, Materials Science, or Physics Responsibilities: Own process flows and integration strategy for advanced nodes Drive technical coordination between process modules (FEOL to BEOL) Analyze inline metrology and electrical test data to optimize performance Evaluate design-process interactions and reliability risks Requirements: Deep understanding of CMOS process stack and device physics Hands-on with data analysis and process simulation (TCAD) Cross-functional experience with process, design, yield, and ...

Fabrication Engineer Semiconductor Fab Job Title: Fabrication Engineer Location: [Cleanroom facility / Fab R&D / Pilot line] Experience: 0–4 years Education: B.Tech/M.Tech in Microelectronics, Physics, or Electronics Responsibilities: Supervise and execute process flows in semiconductor cleanrooms Handle wafers during various fabrication steps (photolithography, etching, ion implant, etc.) Document standard operating procedures (SOPs) and run logs Maintain wafer quality and coordinate with process engineers Requirements: Familiar with basic CMOS processing and wafer handling Comfortable working in ISO Class 5–7 cleanrooms Detail-oriented and safety-conscious Willingness to work in shifts

Process Engineer Semiconductor Fabrication Job Title: Process Engineer – Front-End/Back-End Location: [Sriperumbudur / Bangalore / Noida / Sanand / Mohali] Experience: 1–5 years Education: B.E/B.Tech or M.Tech in Electronics, Materials Science, Physics, or related field Responsibilities: Develop, monitor, and optimize semiconductor fabrication processes (Etch, CVD, Lithography, CMP, etc.) Drive process qualification and stability across lots and tools Collaborate with equipment and integration teams to solve process issues Maintain process documentation and support continuous improvement initiatives Requirements: Understanding of CMOS process flow Experience with wafer processing tools and S...

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Will Include, But Are Not Limited To Design and maintain standard cells layout for new DRAM products on new technology Lead the stdcells layout projects from initial spec definition to till PPA qualified library release Closely collaborate with DTCO team to develop stdcells architecture for emerging technologies Perform layout verification like LVS/DRC/Latchup, quality check an...

Role Overview: As a skilled professional in Standard Cell Library Development, you will leverage your hands-on experience and expertise to contribute effectively to the characterization processes. Your solid understanding of CMOS and FinFET technologies will be key in ensuring the success of the projects at hand. Exposure to Verilog modeling will be advantageous in this role, although it is not mandatory. Your role will require strong debugging and problem-solving skills specifically related to cell design, SPICE simulation, and characterization. This will enable you to address challenges effectively and ensure the quality of the developed libraries. Key Responsibilities: - Contribute effect...

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

General Summary: Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues. Minimum Qualifications: Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, El...

We are looking for an experienced Analog Layout Engineer with 8+ years of hands-on experience in full custom layout of analog and mixed-signal blocks. The ideal candidate should have expertise in advanced CMOS technologies and be capable of delivering high-quality layout from specifications to tape-out. Key Responsibilities: Execute full custom layout for analog/mixed-signal blocks (OpAmps, Bandgaps, LDOs, ADCs, etc.) Floorplanning, device matching, parasitic optimization, and electromigration compliance Perform DRC/LVS/ERC checks and work closely with verification teams Collaborate with circuit designers to optimize performance and area Ensure quality layout delivery in accordance with tape...

We are seeking a highly skilled Senior Analog Design Engineer with 6+ years of experience in designing, simulating, and validating analog and mixed-signal circuits. The ideal candidate should have hands-on expertise across the full custom design flow, from specification to silicon validation. Key Responsibilities: Design and develop analog/mixed-signal IPs such as ADCs, DACs, LDOs, Bandgaps, PLLs, Op-Amps, etc. Perform schematic entry, simulations (pre-layout/post-layout), and layout supervision. Drive transistor-level design using industry-standard tools (Cadence/Synopsys). Lead block-level design reviews, documentation, and verification. Collaborate with layout, digital, and validation tea...

Job Opportunity: Technical Editor We are currently seeking a highly skilled and detail-oriented Technical Editor to join our team. The ideal candidate will meet the following qualifications: Education: Must hold a degree. Experience: A minimum of 2 years of experience as a technical editor, with expertise in both journals and books, preferably with a focus on books. Expertise in Style Manuals: In-depth knowledge of style manuals such as AMA (American Medical Association), APA (American Psychological Association), and CMoS (Chicago Manual of Style). Endnote Editing: Proven experience in editing endnotes in accordance with CMoS style. Proficient in MS Office: Strong working knowledge of MS Off...

As a Semiconductor Domain Consultant for a reputable multinational corporation, your role will involve leveraging your expertise in semiconductor manufacturing processes, chip design, and testing methodologies. You should have a strong understanding of semiconductor technologies such as CMOS, memory devices, RF, power semiconductors, and sensors. Additionally, experience in semiconductor supply chain management and market analysis is expected. Key Responsibilities: - Utilize your expertise in semiconductor manufacturing processes, chip design, and testing methodologies - Demonstrate a strong understanding of semiconductor technologies including CMOS, memory devices, RF, power semiconductors,...