6 Cmos Devices Jobs

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3.0 - 7.0 years

0 Lacs

bhubaneswar

On-site

As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and full-chip integration. Your role will involve performing and resolving LVS/DRC violations independently, collaborating with circuit design teams to optimize layout quality and performance, and ensuring layouts meet design matching and parasitic constraints. You will have the opportunity to work with advanced nodes like 7nm, 16nm, and 28nm, leveraging your 3+ years of relevant Analog Layout experience. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Perform and resolve LVS/DRC violations independently - Collaborate ...

Posted 2 weeks ago

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0.0 - 7.0 years

0 Lacs

karnataka

On-site

As an Analog Mixed Signal Designer at ARF Design, you will be responsible for working on the design of building blocks used in high-speed IPs such as DDR, LPDDR, HBM, UCIe, and PCIe. Your primary responsibilities will include: - Deriving circuit block level specifications from top-level specifications - Conducting optimized transistor-level design of analog and custom digital blocks - Performing Spice simulations to cover detailed specifications - Guiding layout design for best performance, matching, and power delivery - Characterizing the performance of designs in PVT + mismatch corners, including reliability checks - Generating and delivering behavioral (Verilog), timing (lib), and physica...

Posted 2 weeks ago

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4.0 - 7.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Skills: Analog Circuit Design, DACs, PLL, DDR, B.tech, Electronics, VLSI, Semiconductor, ! at ARF Design Are you an / looking for your next challenge ARF Design is hiring passionate individuals to join our dynamic team! As Part Of Our Team, You'll Be Working On The Design Of Cutting-edge Building Blocks Used In High-speed IPs Such As , , , , , . Here's What You Can Expect : Derive circuit block level specifications. Conduct optimized transistor-level design. Perform Spice simulations. Guide layout design for optimal performance. Characterize designs in PVT + mismatch corners. Generate/deliver behavioral, timing, and physical models. Conduct design reviews at different phases. : BE/M-Tech in ...

Posted 1 month ago

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0.0 - 7.0 years

0 Lacs

karnataka

On-site

You are looking for Analog Mixed Signal Designers to join our team and work on designing building blocks for high-speed IPs such as DDR, LPDDR, HBM, UCIe, and PCIe. As a member of our team, your responsibilities will include deriving circuit block level specifications from top-level specifications, designing optimized transistor-level analog and custom digital blocks, conducting Spice simulations to meet detailed specifications, guiding layout design for optimal performance, matching, and power delivery, performing performance characterization of designs in various conditions including reliability checks, and generating/delivering behavioral, timing, and physical models of circuits. You will...

Posted 1 month ago

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3.0 - 7.0 years

0 Lacs

bhubaneswar

On-site

As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and integrating them into full-chip designs. Your expertise in lower technology nodes, physical layout techniques, and verification processes will be crucial for success in this role. You will collaborate with circuit design teams to optimize layout quality and performance, ensuring that layouts meet design matching and parasitic constraints. Working with advanced nodes like 7nm, 16nm, and 28nm, you will play a key role in advancing the company's cutting-edge projects. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Pe...

Posted 3 months ago

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3.0 - 7.0 years

0 Lacs

bhubaneswar

On-site

As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and full-chip integration. Your role will involve performing and resolving LVS/DRC violations independently, collaborating with circuit design teams to optimize layout quality and performance, and ensuring layouts meet design matching and parasitic constraints. You will have the opportunity to work with advanced nodes like 7nm, 16nm, and 28nm, leveraging your 3+ years of relevant Analog Layout experience. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Perform and resolve LVS/DRC violations independently - Collaborate ...

Posted 3 months ago

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