6 Clock Distribution Jobs

Role Overview: You have a unique opportunity to join Microchip Technology, Inc., a global organization with a diverse and empowering work culture. As a SoC Validation Engineer in the Wireless Products Group, you will be responsible for validating and characterizing future 32-bit microcontroller-based 802.11n Wi-Fi, Bluetooth, and Zigbee Products. Your role will involve hardware, software, and lab analysis tasks as well as collaborating with cross-functional teams to ensure successful product development. Key Responsibilities: - Develop validation requirements and test plans for peripherals and full chip SOC operation based on device specifications and design requirements. - Enhance automated...

Job Overview: Physical Design Engineer implements the entire ASIC/SoC back end design flow from RTL to GDSII to create design databases ready for manufacturing with a special focus on power, performance & area optimization with next generation state of the art process technologies. Physical Design Engineer Experience: 5 Years & above (Mandatory). Education: BE/ ME/B. Tech/M. Tech/MS or equivalent disciplines with an emphasis on VLSI design Location: Bengaluru, India EMPLOYMENT TYPE: FULL TIME Roles & Responsibilities: - Take complete ownership of the implementation of Block level designs and Chip level design - Responsible for planning and execution of all aspects of Physical Design includin...

Role Overview: As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on cutting-edge technologies to develop world-class products, collaborating with cross-functional teams, and meeting performance requirements to drive digital transformation and create a smarter, connected future for all. Key Responsibilities: - Hands-on experience in analog circuit design - Architecture, design, and development of analog/mixed signal hard macros for the PLL IP Design team - Designing multiple analog building blocks such as Bias, References, Op-amp, LDOs,...

Alternate Job Titles: Senior ASIC Physical Design Engineer Physical Implementation Engineer Senior Level IC Physical Design Specialist Senior SoC Physical Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and driven engineer with a solid foundation in integrated circuit (IC) design and physica...

You should be a PNR Lead with over 8 years of experience, based in Bangalore. Your role will involve handling Full chip PnR tasks such as timing, congestion, and CTS issues, with an understanding of IO ring, package support, and multi-voltage design. It is crucial to have a deep understanding of synthesis, place & route, CTS, timing convergence, IR/EM checks, and signoff DRC/LVS closure. Your responsibilities will include independently planning and executing all aspects of physical design, such as floor planning, place and route, Clock Tree Synthesis, Clock Distribution, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, and DFM. You must have experience ...

You will be part of the SoC Clocking team, focusing on next-generation Networking and Edge SoC designs. Your responsibilities will include product pathfinding, end-to-end clocking architecture, clock distribution, and overseeing SoC clock implementation and Sign off. You should have experience in SoC Clock Architecture, clock distribution, and system-level clocking. Additionally, hands-on experience with spice, clock jitter simulations, and different jitter components is required. You will work on clocking methodologies and guidelines for IPs or SoCs and create scalable flows for clocking infrastructure to enhance performance and power in the design. Collaboration with Platform, package, IP,...