Name: Jobpe
Address: T-Hub, Plot No 1/C, Sy No 83/1, Raidurgam panmaktha, Knowledge City Rd, Hyderabad, Telangana, 500081, IN
Telephone: +91-83339-09630
Price range: Free

Integrated Photonics Scientist/Engineer (Founding Team) SpaceRelays

3.0 - 10.0 years

0 - 0 Lacs

karnataka

On-site

As a Chief Integrated Photonics Scientist/Engineer at SpaceRelays, your role will involve driving the design, characterization, and optimization of advanced optoelectronic components and integrated modules for scalable and field-deployable systems. Here are the key responsibilities: - Conduct photonic device simulation to support the design process - Lead chip-level integration and packaging efforts - Collaborate with multidisciplinary hardware and systems teams for system validation To qualify for this position, you should have a PhD or M.S. in Photonics, Nanotechnology, or Applied Physics, or a relevant background, along with 3-10 years of total experience in integrated photonic or silicon...

Posted 1 month ago

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Integrated Photonic Scientist/Engineer SpaceRelays

3.0 - 10.0 years

0 Lacs

karnataka

On-site

As an Integrated Photonic Scientist/Engineer at SpaceRelays, you will play a crucial role in designing, characterizing, and optimizing advanced optoelectronic components and integrated modules for cutting-edge free-space optical communication systems. Your responsibilities will include: - Conducting photonic device simulations to enhance performance - Integrating chips at the system level for scalability - Packaging components for field deployment - Validating systems in collaboration with multidisciplinary teams To excel in this role, you should hold a PhD or M.S. in Photonics, Nanotechnology, Applied Physics, or a related field, with at least 3-10 years of experience in integrated photonic...

Posted 1 month ago

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Analog Mixed Signal UST

5.0 - 9.0 years

0 Lacs

karnataka

On-site

You should have a minimum of 5 years of experience as an analog layouter and be familiar with GF40nm node technology. Your expertise should include working with PVS, LVS, DRC, Antenna, and MRC tools. Additionally, you should have a proven track record of delivering IP top-level for chip-level integration and conducting thorough reviews and sign-offs. Experience in coordinating the work of other layouters at the sub-IP level would be advantageous.,

Posted 4 months ago

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