291 Chip Design Jobs - Page 2

"> Search Jobs Find Jobs For Where Search Jobs Senior Verification Engineer Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12303 Remote Eligible No Date Posted 21/07/2025 Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification. You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL). With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs. You possess excellent problem-solving skills and can work effectively in a collaborative environment. Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs. What You ll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs. Performing simulation, random and direct stimulus development, and coverage review. Working closely with digital designers for debugging and achieving the desired coverage. The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology. Enhancing the reliability and performance of Synopsys products through meticulous verification processes. Driving innovation in the semiconductor industry by verifying complex digital designs. Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards. Improving the efficiency of the verification process through automation and advanced verification methodologies. Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers. What You ll Need: B.Tech/M.Tech with 3+ years of relevant experience. Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in scripting and automation using TCL, PERL, or Python. Strong debug and diagnostic skills. Experience in building and updating functional verification environments. Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams. A proactive problem solver with a keen eye for detail. An enthusiastic learner with a passion for technology and innovation. A team player who thrives in a collaborative environment. A highly organized individual who can manage multiple tasks and priorities effectively. The Team You ll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs. Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs. We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

"> Search Jobs Find Jobs For Where Search Jobs Senior Design Verification Engineer Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12213 Remote Eligible No Date Posted 21/07/2025 Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification. You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL). With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs. You possess excellent problem-solving skills and can work effectively in a collaborative environment. Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs. What You ll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs. Performing simulation, random and direct stimulus development, and coverage review. Working closely with digital designers for debugging and achieving the desired coverage. The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology. Enhancing the reliability and performance of Synopsys products through meticulous verification processes. Driving innovation in the semiconductor industry by verifying complex digital designs. Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards. Improving the efficiency of the verification process through automation and advanced verification methodologies. Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers. What You ll Need: B.Tech/M.Tech with 3+ years of relevant experience. Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in scripting and automation using TCL, PERL, or Python. Strong debug and diagnostic skills. Experience in building and updating functional verification environments. Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams. A proactive problem solver with a keen eye for detail. An enthusiastic learner with a passion for technology and innovation. A team player who thrives in a collaborative environment. A highly organized individual who can manage multiple tasks and priorities effectively. The Team You ll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs. Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs. We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

You are a passionate engineer eager to make a tangible impact in the world of analog and mixed-signal design. With a strong foundation in electronics or electrical engineering, you thrive in environments that challenge your technical and creative abilities. You are meticulous in your approach, ensuring the highest quality in every design you touch. Your curiosity drives you to stay at the forefront of CMOS technologies and deep submicron process innovations. You possess a collaborative spirit, enjoying teamwork with cross-functional groups to deliver best-in-class solutions. Communication is one of your strengths, enabling you to articulate complex technical concepts clearly and effectively. You are adaptable, excited by emerging technologies like DDR and HBM memory interfaces, and always seeking opportunities to grow your expertise. Above all, you are driven by a desire to contribute to groundbreaking products that set industry standards and improve the way people live and connect. What You ll Be Doing: Design and layout of DDR/HBM Memory Interface I/O circuits, including GPIO and special IOs, ensuring high performance and reliability. Collaborate closely with DDR/HBM PHY, package, and system engineering teams to align on design specifications and project goals. Develop and optimize analog and mixed-signal circuits in deep submicron CMOS processes. Contribute to the definition and implementation of circuit design flows and methodologies for advanced memory interfaces. Analyze and verify circuit performance against JEDEC and industry standards for DDR interfaces. Document your design work and effectively communicate progress and technical challenges with internal teams. Participate in design reviews, provide constructive feedback, and continuously improve design quality and efficiency. The Impact You Will Have: Drive innovation in the design of high-speed memory interfaces, directly influencing the performance of next-generation electronic devices. Enhance Synopsys reputation as a leader in analog and mixed-signal IP for advanced semiconductor applications. Help deliver robust, high-quality silicon solutions that power cutting-edge technologies worldwide. Facilitate seamless integration of memory interfaces into complex SoC designs, improving time-to-market for customers. Contribute to customer success by ensuring compliance with industry standards and exceeding reliability expectations. Support the continuous improvement of design methodologies and best practices within the team and organization. What You ll Need: BTech or MTech in Electronics or Electrical Engineering. 2 4 years of experience in analog/mixed-signal CMOS circuit design, preferably with exposure to deep submicron process technologies. Strong understanding of CMOS processes, circuit design, and layout methodologies. Familiarity with ASIC design flow and ESD concepts; hands-on experience is a plus. Knowledge of JEDEC requirements for DDR interfaces, DDR timing, ODT, and SDRAM functionality is highly desirable. Proficiency in executing circuit design tasks efficiently while maintaining high product quality. Effective written and verbal communication skills for collaboration with internal teams. Who You Are: Detail-oriented and quality-driven, consistently striving for technical excellence. Collaborative team player eager to contribute and learn in a dynamic, cross-functional environment. Adaptable and resourceful, able to manage multiple priorities and shifting project requirements. Proactive problem-solver with a growth mindset, always seeking opportunities for innovation and improvement. Clear communicator, able to convey complex technical ideas to both peers and non-technical stakeholders. The Team You ll Be A Part Of: You ll join a diverse and talented group of engineers focused on developing industry-leading analog and mixed-signal IP for memory interfaces. Our team collaborates across disciplines to tackle complex technical challenges and deliver innovative solutions. We value open communication, knowledge sharing, and mutual support as we push the boundaries of what s possible in semiconductor technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

As an Infineon Application Engineer, you will assist customers to use Infineon Bluetooth connectivity chips in their applications- You will work as a trusted hands-on technical advisor for customers to use Infineon Bluetooth chips in commercial and automotive applications- Job Description Provide technical support to customers, FAEs, module partners and distributors through digital channels to customers to use Infineon Bluetooth chips during evaluation and development phase of their application- You will also assist in selection, evaluation and integration of Infineon Bluetooth products Recreate, debug and solve the technical issues reported by customers at any time during the life cycle of Bluetooth connectivity chips- Work cross functionally with product line applications, hardware design, chip design, software and content development teams to solve issues reported by customers- Develop collaterals (code examples, application notes, knowledge articles) for customers- Prepare and deliver product/application training to peers and customers- Your Profile Bachelors/Masters in Electronics/Electronics and Communication Engineering or related degree- 3 to 5 years experience working on Bluetooth technology as an application or software engineer- Exposure to Bluetooth profiles, Bluetooth audio will be an added advantage- Ability to conduct investigative research to identify and resolve customers technical issues- Experience in writing and debugging software in C/C++ or any other high-level languages- Exposure to embedded systems and/or linux, Python, scripting will be an added advantage- Experience in using tools like Oscilloscope, multi-meter, function generator, spectrum analyser, air log sniffers etc- Interest and ability to learn new technologies very quickly- Good communication skills, both written and verbal- A customer-oriented mindset and focus on innovative, scalable methods to make customers self-sufficient

You are a seasoned professional with a passion for analog design and a knack for solving complex problems- With a strong foundation in CMOS processes and deep submicron technologies, you bring a wealth of knowledge and experience to the table- You thrive in a collaborative environment, where your excellent communication skills enable seamless interactions with internal development teams- You are adept at executing circuit design tasks with precision, ensuring the highest product quality and efficiency- Your familiarity with ASIC design flow and JEDEC standards for DDR interfaces sets you apart, and you are always eager to learn and adapt to new challenges- Your technical acumen, combined with your dedication and innovative mindset, makes you an ideal fit for our team- What You ll Be Doing: - Ownership of complete physical implementation at block level & chip level- Responsible for delivering timing clean blocks/chip level that meet design targets- - DRC, LVS & IR closure- Evaluates all aspects of the physical design flow from place and route, timing, PV & IR and is able to setup these flows- - Experience in all chip level tasks (P&R, STA, PV, IR) - Work closely with the frontend design team to resolve design issues - The Impact You Will Have: Enhancing the performance and efficiency of our silicon IP portfolio- Contributing to the rapid integration of advanced capabilities into SoCs- Reducing the time-to-market and risk for our customers products- Driving innovation in analog design and setting new industry standards- Strengthening Synopsys position as a leader in chip design and verification- Empowering the development of high-performance, differentiated products- What You ll Need: - Candidates with MSEE/BSEE with 5+ years of related experience- Possesses in depth understanding of specialization area plus working knowledge of one other related area- - Resolves issues in creative ways- - Exercises judgement in selecting methods and techniques to obtain solutions- - Executes project responsibilities from start to completion- - Contributes to moderately complex aspects of a project- - Determines and develops recommendations to solutions- - Works on team-driven or task-oriented projects- - May guide more junior peers with aspects of their job- - Networks with senior internal and external personnel in own area of expertise- - Strong knowledge on scripting using tcl, perl - Who You Are: A collaborative team player with a proactive approach- Detail-oriented with a commitment to quality and efficiency- Innovative and adaptable, always seeking to learn and grow- Effective communicator, able to convey technical information clearly- Problem-solver with strong analytical skills- The Team You ll Be A Part Of: You will join a dynamic team of talented engineers dedicated to pushing the boundaries of analog design- Our team is focused on delivering high-quality silicon IP solutions that meet the unique performance, power, and size requirements of our customers- We foster a collaborative environment where innovation and continuous learning are highly valued- Together, we drive the development of cutting-edge technologies that shape the future of the semiconductor industry

You will be working as a Semiconductor Domain Consultant for a reputable multinational corporation. Your primary responsibilities will include leveraging your expertise in semiconductor manufacturing processes, chip design, and testing methodologies. You should have a strong understanding of semiconductor technologies such as CMOS, memory devices, RF, power semiconductors, and sensors. Additionally, you will be expected to have experience in semiconductor supply chain management and market analysis. In this role, it is essential to possess excellent communication, presentation, and client relationship management skills. You should be capable of working both independently and collaboratively within a team environment. Knowledge of industry standards, regulations, and certifications is crucial for this position. Project management experience would be considered advantageous. It would be beneficial if you have experience with advanced semiconductor packaging technologies and are familiar with semiconductor EDA (Electronic Design Automation) tools and software. An understanding of semiconductor equipment and infrastructure is also desirable. Furthermore, experience in emerging fields like AI/ML hardware accelerators, quantum computing, and IoT would be an added advantage. The position is based in PAN India, and the ideal candidate will possess a strong technical skill set in semiconductor manufacturing processes. If you meet the requirements and are looking for a challenging opportunity in the semiconductor domain, we encourage you to apply promptly.,

Applications Engineer who can provide support on Debugging customer technical issues on embedded hardware, firmware and software. Job Description In your new role you will: Debug customer technical issues on embedded hardware, firmware and software. Provide embedded hardware, firmware design and development services to realize Customer applications using Infineon products Analyze and debug analog, digital and micro-controller circuits. Write and debug software in C and/or assembler. Must have very good communications skills, both written and verbal. Work cross functionally with Marketing, hardware design, chip design, and software and content development teams. Your Profile You are best equipped for this task if you have below skills: Can Write and debug software in C and/or assembler. Should be familiar with Micro-controller architecture. Usage of tools like oscilloscope, logic analyzer and spectrum analyzer. Interest and ability to learn new technologies very quickly Good debugging and problem-solving skills. Good team player Knowledge about ARM architecture. Knowledge about PCB schematic layout design. for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant s experience and skills. Learn more about our various contact channels. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity Inclusion at Infineon.

The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge. Work hard. Have fun. Make history. At Amazon, DFT (Design-for-Testability) is a multi-faceted job that involves architecture definition, logic design, verification, test patterns generation, chip bring-up and more. As a DFT Engineer, you will impact and see the device through its entire lifecycle, from definition stage to high volume production. You will be working in close collaboration with multiple VLSI engineering groups including design, verification, backend, test, reliability and more. As part of the chip design group, you will: Contribute to the design and verification of DFT logic and components Help to drive the sign-off on a generation of high-quality test and debug patterns for high coverage on silicon Review sign-off level timing closure using static timing analysis of DFT modes Perform wafer probe testing, ATE testing, silicon bring-up, diagnosis and support for physical failure analysis Take high volume chips to production with high coverage ATE test program BS degree in Computer Engineering/Electrical Engineering 5+ years in semiconductor companies as a DFT lead/manager Chip design experience in Verilog and System Verilog Chip verification experience, UVM methodology Scan insertion tools and methodologies MBIST and BISR, BIHR insertion tools and methodologies EFUSE controllers and related structures Top level DFT architecture definition experience Gate-level simulations Static timing analysis, DFT related timing closure Scripting (Perl/Tcl) MS degree in Computer Engineering/Electrical Engineering or related field Excellent communication skills. Should be able to well communicate and establish relations with internal customers , Manufacturing, and equipment vendors Energetic, self-motivated Pro-active, oriented on execution Attentive to details and quality Team player, with the ability to work in a rapidly evolving/changing environment Ability to work well with overseas partners

Where Software Engineering, Staff Engineer Bengaluru, Karnataka, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 9453 Date posted 07/18/2025 Share this job Email LinkedIn X Facebook Alternate Job Titles: Software Engineer, Staff We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned software engineer with a passion for innovation and problem-solving. With a BE/B.Tech degree in programming, computer/electronics, IT, or a related engineering field, you bring 5-8 years of hands-on experience in software development. Your proficiency in Python or C/C++, coupled with a strong understanding of algorithms and data structures, sets you apart. You thrive in UNIX/Linux and Windows OS environments and have a keen interest in exploring new technologies. Your ability to design and implement sophisticated algorithms, along with your prior knowledge of EDA tools and schematic/layout design, makes you an ideal candidate. Excellent English communication skills and the ability to compile functional and design specifications are essential for this role. What You ll Be Doing: Designing, developing, troubleshooting, and maintaining software programs for std. cells development automations Involving in all phases of software development, including project planning, problem identification, design specification, development, testing, and product support Exercising judgment within broadly defined practices and policies in selecting methods, techniques, and evaluation criteria for obtaining results Developing state-of-the-art solutions through technical contributions that lead to significant product differentiation Designing and implementing sophisticated algorithms to solve complex problems Collaborating with cross-functional teams to ensure seamless integration and delivery of software solutions The Impact You Will Have: Driving innovation in software solutions for std. cells development automations Enhancing the efficiency and effectiveness of our software development lifecycle Contributing to the development of cutting-edge technology that sets Synopsys apart in the industry Ensuring high-quality software delivery through rigorous testing and problem-solving Influencing the design and implementation of future software projects Supporting the continuous improvement of our software development processes What You ll Need: Proficiency in Python or C/C++ Knowledge of algorithms and data structures Working experience on UNIX/Linux and Windows OS Knowledge in OOP programming Strong desire to learn and explore new technologies Ability to demonstrate good analysis and problem-solving skills Prior knowledge and experience of EDA tools and schematic/layout design Excellent English language communication skills Ability to compile functional and design specifications Who You Are: Innovative thinker with a passion for technology Excellent communicator and collaborator Detail-oriented and highly organized Adept at problem-solving and critical thinking Proactive and self-motivated The Team You ll Be A Part Of: You will be part of a dynamic and innovative team focused on developing and maintaining software solutions for std. cells development automations. Our team values collaboration, creativity, and continuous improvement, and we are dedicated to pushing the boundaries of technology to deliver exceptional products. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Staff R&D Engineering-PnR-7917 Hillsboro, Oregon Engineering High-Bandwidth Memory (HBM) ASIC Verification Engineer Kanata, Canada Engineering Hardware Test & Validation Engineer Moreira, Portugal Engineering

Analog Design Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12206 Remote Eligible No Date Posted 16/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an enthusiastic and detail-oriented engineer passionate about analog and mixed-signal circuit design. With a strong foundation in CMOS technologies and a keen interest in deep submicron process challenges, you thrive in collaborative, fast-paced environments. You enjoy diving deep into technical problems, leveraging your academic background in electronics or electrical engineering to design innovative solutions. You are adept at balancing creativity with precision, ensuring your designs meet rigorous standards for quality, performance, and reliability. You communicate effectively, both in writing and verbally, making it easy for you to share ideas and work closely with cross-functional teams. Your curiosity compels you to stay updated on the latest industry advancements, and you re always eager to learn new methodologies or tools. You value diversity and inclusive teamwork, and you actively contribute to a positive and supportive work culture. With 1 3 years of practical experience, you are ready to take on new challenges, grow your skills, and make a tangible impact on industry-leading products. What You ll Be Doing: Designing DDR/HBM Memory Interface I/O circuits, including GPIO and special IOs, ensuring robust performance and compliance with stringent standards. Collaborating closely with the DDR/HBM PHY team, package engineers, and system engineers to meet and exceed design specifications and integration requirements. Developing and optimizing circuit layouts, applying advanced CMOS design methodologies and best practices to enhance yield and manufacturability. Conducting simulations, analysis, and verification of analog and mixed-signal circuits to ensure functionality, performance, and reliability. Supporting the ASIC design flow, from concept through tape-out, and assisting in debugging and resolving design issues as they arise. Documenting design processes, decisions, and results, contributing to knowledge sharing and continuous improvement within the team. Engaging in technical discussions and reviews, providing input on design trade-offs and innovative approaches. The Impact You Will Have: Drive the development of high-performance memory interface solutions, directly influencing the capabilities of next-generation semiconductor products. Enhance the efficiency and quality of circuit designs, contributing to faster time-to-market and reduced development costs. Strengthen Synopsys reputation for reliable and innovative analog/mixed-signal IP by delivering robust and manufacturable designs. Facilitate seamless integration and collaboration across multidisciplinary teams, ensuring holistic product success. Support the adoption of new technologies and design methodologies, keeping Synopsys at the forefront of industry trends. Enable customers to achieve superior system performance and energy efficiency through your expert design contributions. Help expand Synopsys portfolio of market-leading memory interface solutions, supporting growth and customer satisfaction. What You ll Need: Solid knowledge of CMOS processes and deep submicron technology challenges. Experience with CMOS circuit design, layout methodology, and flow; understanding of analog/mixed-signal circuits. Familiarity with ASIC design flow and EDA tools. Basic understanding of ESD concepts; knowledge of JEDEC DDR interface requirements, DDR timing, ODT, and SDRAM functionality is a plus. Ability to execute assigned circuit design tasks efficiently, ensuring high product quality. Strong written and verbal communication skills for effective collaboration. Who You Are: Collaborative team player who thrives in a diverse and inclusive environment. Detail-oriented with strong analytical and problem-solving skills. Proactive learner with a passion for innovation and continuous improvement. Adaptable, open to feedback, and resilient in the face of challenges. Effective communicator, able to articulate complex ideas clearly to technical and non-technical stakeholders. The Team You ll Be A Part Of: You ll join a dynamic, multidisciplinary group of engineers focused on developing cutting-edge memory interface solutions for the world s leading semiconductor companies. The team values creativity, technical excellence, and open collaboration. By working together, you ll contribute to delivering high-impact analog and mixed-signal IP that powers advanced computing, AI, and connectivity applications. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

About the Company: Founded with the vision of building a runtime reconfigurable, future-proof processor, Morphing Machines is a fabless semiconductor company working on a ground-breaking technology that will transform the chip design landscape. Morphing Machines patent protected IP, REDEFINE, can concurrently accelerate heterogenous workloads, on a homogenous fabric of processing cores. REDEFINE combines ASIC (Application Specific Integrated Circuit) like performance with the reconfigurability of FPGAs (Field Programmable Gate Arrays). Morphing Machines innovation enables dataflow compute, which is a paradigm shift in the current processor industry. Due to the nature of our architecture, we can cater across domains from Data Centers, Quantitative Finance, AI/ML acceleration, Edge Vision to High Performance Compute (HPC) applications, all with the same hardware fabric. At Morphing Machines, we are building a cutting-edge technology guided by our vision to build truly software-defined hardware. Job Overview: We are seeking a skilled FPGA Engineer who will drive the emulation of our REDEFINE dataflow accelerator on cloud-based Xilinx FPGA platforms and physical FPGA boards. This is an exciting opportunity to work at the intersection of cutting-edge FPGA technology, cloud platforms, and hardware-software co-design. Key Responsibilities : FPGA Emulation Development Design, implement, and optimize FPGA-based emulation environments for the REDEFINE dataflow accelerator. Develop FPGA design and RTL code for various hardware system and sub-system configurations. Integrate and simulate the emulation environment to validate the functionality and performance of the accelerator. Collaborate closely with hardware and software teams to ensure accurate architectural representation in emulation. Work with RTL verification teams to identify and resolve design issues using simulation and debug tools. Document and report emulation results, test findings, and recommendations to the broader engineering team. Cloud-Based Xilinx FPGA Platform Integration Configure and deploy the REDEFINE dataflow accelerator on cloud-based Xilinx FPGA platforms (e.g., Amazon EC2 F1 instances, Xilinx Alveo cards). Optimize and fine-tune the emulation environment for high performance on cloud FPGA platforms. Collaborate with software teams to integrate the software stack into the cloud-based emulation environment. Required Skills & Experience : Bachelor s or Master s degree in Electrical Engineering, Computer Engineering, or related field. 10+ years of experience as an FPGA Engineer specializing in emulation and validation. Strong expertise in FPGA design, implementation, and verification using Xilinx FPGAs and Vivado tools. Experience with cloud-based FPGA platforms such as Amazon EC2 F1 or Xilinx Alveo. Proficiency in RTL coding (VHDL or Verilog). Knowledge of RISC-V architecture and dataflow accelerators (preferred). Familiarity with FPGA debugging tools and methodologies. Strong analytical and problem-solving skills. Excellent communication and teamwork abilities. Self-motivated, detail-oriented, and passionate about working on innovative technologies. What We Offer : The opportunity to contribute to the emulation and validation of a novel, many-core dataflow accelerator targeting next-generation high-performance systems. A collaborative work environment with talented teams across hardware architecture, system software, and FPGA engineering. Exposure to advanced FPGA technology, cloud deployment at scale, and the design flow leading up to GDS-II. Apply Now

Infrastructure RD Engineer (Sr.Staff) Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development. Play Video Job Description Category Engineering Hire Type Employee Job ID 10742 Remote Eligible No Date Posted 15/07/2025 We Are: You Are: You are a highly skilled and experienced Infra Engineer with a passion for developing advanced software solutions. With a solid background in computational geometry and distributed processing, you thrive on tackling complex challenges and optimizing performance. You possess expertise in C++, Python, and distributed computing environments, and have a proven track record of designing and developing efficient concurrent algorithms for distributed processing on both CPU and GPU. Your collaborative nature and excellent communication skills enable you to work effectively as part of a global team, ensuring seamless integration and optimization of infrastructure components. You are driven by the opportunity to contribute to the cutting-edge of semiconductor development and are committed to maintaining and improving software performance and scalability. You are adept at debugging and troubleshooting production-related issues, ensuring smooth operation and efficiency. Your advanced knowledge and experience make you a sophisticated professional who can work independently with limited supervision, while also achieving operational and functional targets that impact department results. What You ll Be Doing: Designing software to support large-scale geometric data analysis and high-performance computing for OPC solutions. Optimizing infrastructure for distributed computing, ensuring seamless GPU integration. Collaborating with development teams to ensure efficient data handling and computational resource allocation. Debugging and troubleshooting infrastructure issues related to production line integration. Maintaining and troubleshooting the tool to meet performance and scalability requirements. Regularly contributing to the cutting-edge of semiconductor development by enhancing software performance and scalability. The Impact You Will Have: Advancing the development of high-performance silicon chips and software content. Enabling leading IC manufacturing through efficient software solutions. Contributing to the optimization of infrastructure for distributed computing. Ensuring seamless integration and operation of infrastructure components. Improving software performance and scalability for large-scale data analysis. Enhancing the overall efficiency and effectiveness of semiconductor development processes. What You ll Need: M.S. or Ph.D. in Computer Science, Engineering, or the Physical Sciences. 6+ years of experience in software development, with a focus on computational geometry and distributed processing. Expertise in C++, Python, and distributed computing environments. Experience in debugging and troubleshooting production-related issues. Strong communication and collaboration skills to work as part of a global team. Who You Are: A proactive problem solver with a passion for innovation. Detail-oriented with a focus on optimizing performance and scalability. An effective communicator with the ability to collaborate across teams. A self-motivated individual who can work independently with limited supervision. A sophisticated professional with advanced knowledge and wide-ranging experience. T he Team You ll Be A Part Of: You will be part of a dynamic and innovative team focused on developing and optimizing infrastructure components for semiconductor development. The team collaborates closely with various development teams to ensure efficient data handling, computational resource allocation, and seamless integration of infrastructure components. Together, you will drive the advancements in high-performance computing and geometric data analysis, contributing to the cutting-edge of semiconductor technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply As an applicant your resume, skills, and experience are being reviewed for consideration. Phone Screen Once your resume has been selected a recruiter and/or hiring manager will reach out to learn more about you and share more about the role. Interview You will be invited to meet with the hiring team to measure your qualifications for the role. Our interviews are held either in person or via Zoom. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Job Summary Questa verification IP s help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will work well with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We don t need superheroes, just super minds. Youre an Electronics Engineer (B.Tech/ M.Tech) or related field from a reputed institute Youve got excellent knowledge of verification engineering and have between 3 - 7 years of working experience as well. Youve sound knowhow of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. Youve intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. You are a great teammate, resilient and sincere, Enjoy learning new things and build knowledge base in new area.

Staff Verification Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12151 Remote Eligible No Date Posted 15/07/2025 Description Staff Verification Engineer, Interface IP We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An experienced and highly skilled ASIC Digital Verification Engineer with a passion for ensuring the highest quality in digital design. You have a deep understanding of verification methodologies and are proficient in using advanced verification tools and techniques. Your expertise allows you to work independently, taking on complex challenges and delivering innovative solutions. You are detail-oriented, with a strong analytical mindset, and can communicate effectively with various stakeholders. Your ability to mentor and lead junior engineers is a testament to your extensive experience in the field. You thrive in a collaborative environment and are committed to continuous learning and improvement. What You ll Be Doing: Designing and implementing verification environments to ensure the correctness of Interface IP protocols. Creating and executing detailed test plans to verify complex ASIC designs. Developing and maintaining verification IP and testbenches using SystemVerilog and UVM. Collaborating with design and architecture teams to identify and fix bugs. Performing functional coverage analysis and driving coverage closure. Staying current with the latest verification methodologies and tools to continually improve processes. Mentoring and guiding junior verification engineers in best practices and methodologies. The Impact You Will Have: Ensuring the delivery of high-quality, reliable ASIC designs that meet customer specifications. Enhancing the robustness and efficiency of our verification processes and methodologies. Contributing to the successful launch of Interface IP products, impacting various industries. Driving innovation and excellence within the verification team. Improving the overall performance and functionality of Synopsys IP offerings. Fostering a culture of continuous improvement and technical excellence. What You ll Need: Extensive experience in ASIC digital verification, specifically with Interface IP protocols. Proficiency in SystemVerilog and UVM methodologies. Strong understanding of digital design and verification concepts. Experience with simulation tools such as VCS, ModelSim, or similar. Excellent problem-solving skills and attention to detail. Who You Are: Detail-oriented with a strong analytical mindset. Excellent communicator, able to convey complex technical concepts clearly. Collaborative team player who thrives in a dynamic environment. Proactive and self-motivated, with a commitment to continuous learning. Mentor and leader, capable of guiding and developing junior engineers. The Team You ll Be A Part Of: You will join a dedicated team of engineers focused on the design and verification of high-performance digital IPs. Our team is committed to innovation, quality, and excellence, working collaboratively to push the boundaries of technology. We value continuous learning and professional growth, providing ample opportunities for development and advancement. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Job Overview: As a part of Arms Solutions Engineering group we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools and build the knowledge base that makes custom SoC and CPU chip design possible. Responsibilities: Synthesis, DFT , Floorplan , Place and Route , CTS and Optimization of CPU cores, system interconnect and other ARM Designs. RTL-GDS closure for Hard Macro Analyze design timing, area and power to help improve the quality of ARM Design. Analyze DRC/LVS/PERC/ERC using Calibre and perform Layout edit for Physical Verification closure. Analyze Timing using primetime and perform Timing ECO for design closure Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results Required Skills and Experience : Bachelors or Master s degree equivalent in Electrical Engineering, Computer Engineering or other relevant technical fields. 3+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM and Physical verification Strong Communication and Problem Solving Skills. Experience in crafting and adopting new silicon implementation techniques and methodologies and promote their use with international teams Experience working closely in top and block level Synthesis, DFT, Floor planning, Place and Route, CTS, logical and physical optimization, timing closure and power analysis flows. Proven programming and scripting skills eg. Tcl, Perl, Python, Make. Nice To Have Skills and Experience : Knowledge around Arm based SoCs! Experience with a wide range of programming, scripting & data presentation languages Eg. Tcl, sh, csh, make, R, C, C++, Java, JS, HTML, Perl, Python, Ruby. Experience with low power design techniques (power gating, voltage/frequency scaling) Experience with Verilog RTL design. Experience with ATPG tools/and or production testing. In Return: At Arm, we are guided by our core beliefs that reflect our creative culture and guide our decisions, defining how we work together to surpass ordinary and shape extraordinary. Accommodations at Arm At Arm, we want our people to Do Great Things. . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm Hybrid Working at Arm #LI-BB1 Accommodations at Arm At Arm, we want to build extraordinary teams. . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm

Senior Staff Engineer - Analog Layout Hyderabad, Telangana, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 10892 Remote Eligible No Date Posted 14/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a deep understanding of Analog and Mixed Signal Circuit Layout. With a minimum of 9 years of experience, you bring a strong background in transistor-level analog and mixed-signal layout design. You possess extensive knowledge in CMOS and FINFET technologies, and your expertise in semiconductor device physics sets you apart. Your problem-solving skills are top-notch, and you are detail-oriented, self-directed, and passionate about learning new techniques. You are adept at communicating effectively with cross-functional teams to ensure successful project execution. You thrive in a dynamic environment and are excited about the opportunity to contribute to cutting-edge technology that drives the future. What You ll Be Doing: Plan, estimate area/time, schedule, delegate, and execute tasks to meet project milestones in a multi-project environment. Collaborate with cross-functional teams to ensure successful project execution. Create and review layout documents to ensure they meet quality standards and are delivered on time. Support the team in troubleshoot physical verification issues to achieve clean and desired results Device level floorplan, placement, routing, and physical verification of all critical high-speed blocks Design and development of transistor-level Analog and mixed-signal layout as per project needs The Impact You Will Have: You will drive the Layout design of the project from Floorplan, design and development till the project release. You will drive the Layout design of the project from Floorplan till the project release and lead the project throughout the entire design and development phase. Strong Knowledge and experience in layout design of high-speed blocks in latest Tech Nodes (2nm, 3nm, 5nm) You will drive the design and development of high-quality analog and mixed-signal layouts. Your expertise will ensure the successful implementation of CMOS and FINFET technologies. Through effective troubleshooting, you will contribute to achieving clean physical verification results. Your attention to detail will ensure that layout documents meet quality standards and deadlines. By managing project schedules and milestones, you will help deliver projects on time. Your collaboration with cross-functional teams will enhance project success and innovation What You ll Need: Bachelors or Masters degree in Electrical Engineering or a related field. Minimum 9+ years of experience in Analog and Mixed Signal Circuit Layout. Proficiency in Analog Layout Flow from device placement to GDS release. Strong knowledge of CMOS and FINFET technologies and semiconductor device physics. Experience with EDA tools for custom mixed-signal layout flows. Understanding of CMOS fabrication technology and deep sub-micron effects on layout. Knowledge of electro-migration, reliability concepts, and ESD/LUP concepts as applied to layout. Passion for learning and exploring new techniques. Who You Are: A proactive leader with excellent communication and mentoring skills. Detail-oriented and committed to delivering high-quality results. Innovative and capable of driving technological advancements. Collaborative and able to work effectively with cross-functional teams. A problem-solver with strong analytical skills. The Team You ll Be A Part Of: You will be part of a dynamic and innovative layout design team focused on creating high-performance analog and mixed signal layouts. The team is dedicated to excellence and continuous improvement, working collaboratively to achieve the organizations goals. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Hyderabad View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Analog Mixed Signal Design, Staff Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 11938 Remote Eligible No Date Posted 14/07/2025 We Are: You Are: You are a passionate and detail-oriented engineer with a strong foundation in CMOS analog and mixed-signal circuit design. You thrive in collaborative, high-impact environments and are motivated by the challenge of developing cutting-edge silicon solutions. With a solid background in deep submicron process technologies, you understand the nuances of DDR interfaces and the importance of robust, scalable, and high-performance circuit design. You are adept at balancing innovation with reliability, ensuring that your designs meet stringent quality and efficiency standards. Your experience enables you to approach complex problems methodically, and you are always eager to stay ahead of technology trends, continuously learning and applying new knowledge to your work. You value open communication and are comfortable working across diverse, global teams. You believe that inclusion, diversity, and mutual respect are essential to driving the best outcomes. Whether you re mentoring junior engineers, collaborating with peers, or interacting with cross-functional partners, you demonstrate professionalism, empathy, and a drive for excellence. Above all, you are excited to contribute to solutions that power the smart, connected world of tomorrow. What You ll Be Doing: Designing and developing advanced DDR I/O circuits for next-generation SoCs, focusing on performance, power efficiency, and reliability. Executing end-to-end circuit design tasks, including schematic capture, simulation, layout, and design validation. Collaborating with cross-functional teams to integrate analog and mixed-signal IP blocks into larger system architectures. Ensuring compliance with JEDEC standards for DDR interfaces, including timing, ODT, and SDRAM functionality. Conducting design reviews, analyzing process variations, and implementing robust design-for-manufacturability strategies. Documenting design methodologies, contributing to continuous improvement, and sharing best practices within the team. Providing technical guidance and mentorship to junior engineers and interns. The Impact You Will Have: Enable the rapid integration of high-quality analog IP into complex SoC designs, reducing time-to-market for customers. Drive design innovation that meets the evolving demands of performance, power, and area in advanced semiconductor technologies. Ensure the delivery of robust and reliable DDR I/O solutions that meet or exceed industry standards. Support Synopsys position as a global leader in silicon IP by delivering differentiated, high-performance products. Contribute to customer success by addressing application-specific requirements and providing technical expertise. Promote a culture of knowledge sharing, technical excellence, and continuous improvement within the engineering team. What You ll Need: BTech (with 5+ years of experience) or MTech (with 3+ years of experience) in Electrical/Electronics Engineering or related field. Strong understanding of CMOS process technologies and deep submicron design challenges. Proficiency in analog and mixed-signal circuit design, including layout methodologies and flow. Experience with DDR interface design, JEDEC standards, DDR timing, ODT, and SDRAM functionality (a plus). Familiarity with ASIC design flow and ESD concepts. Demonstrated ability to execute complex design tasks efficiently and with high quality. Who You Are: Analytical thinker with strong problem-solving skills and attention to detail. Effective communicator, both written and verbal, comfortable interacting with global teams. Self-motivated, proactive, and adaptable to rapidly changing project requirements. Team player who values diversity, inclusion, and knowledge sharing. Continuous learner, eager to adopt new tools, methodologies, and industry best practices. The Team You ll Be A Part Of: You ll join a dynamic, collaborative team of analog and mixed-signal designers focused on delivering state-of-the-art DDR I/O and silicon IP solutions. Our team thrives on innovation, technical excellence, and a supportive culture that encourages growth, creativity, and cross-functional collaboration. Together, we tackle complex challenges and enable Synopsys to lead in the rapidly evolving world of semiconductor technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Senior Engineer - Standard Cell Layout Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12161 Remote Eligible No Date Posted 14/07/2025 Senior Standard Cell Layout Engineer Standard Cell Layout Designer Digital Layout Engineer We Are: You Are: You are an experienced and highly motivated professional with a robust technical background in standard cells layout design. Your passion for excellence and precision drives you to create layouts that set the standard for quality and manufacturability. You thrive in collaborative, cross-functional environments, seamlessly working with circuit designers, verification engineers, and other stakeholders to deliver optimized layout solutions. Your expertise in industry-leading EDA tools such as Cadence Virtuoso or Synopsys Custom Compiler enables you to tackle complex digital circuit layouts with efficiency and accuracy. Your systematic approach and strong problem-solving skills allow you to navigate technical challenges with ease, always seeking innovative ways to enhance design methodologies and best practices. You are deeply familiar with physical verification processes and design rule checks, ensuring that every layout you deliver meets stringent quality and manufacturability standards. Your curiosity and commitment to lifelong learning keep you updated on the latest advancements in standard cell layout design, making you an invaluable resource for your team. You communicate effectively, embrace feedback, and are eager to contribute to a culture of continuous improvement and shared success . What You ll Be Doing: Collaborate with cross-functional teams to develop and implement layout designs for digital circuits, ensuring alignment with project goals and timelines. Create and optimize complex standard cell layouts using industry-standard EDA tools such as Cadence Virtuoso or Synopsys Custom Compiler. Perform thorough physical verification and design rule checks (DRC/LVS) to guarantee design integrity and manufacturability. Work closely with circuit designers to understand design specifications, constraints, and performance targets, translating them into robust layouts. Contribute to the development, documentation, and refinement of layout design methodologies, flows, and best practices within the team. Remain up to date with industry trends, emerging technologies, and advancements in standard cell layout design, sharing knowledge with peers. The Impact You Will Have: Deliver high-quality layout designs that form the foundation of Logic Libraries IP development, essential for advanced SOC subsystems. Drive innovation in layout design methodologies, contributing to Synopsys leadership in the industry. Ensure that all designs meet or exceed manufacturability and reliability standards, reducing risk and time-to-market for key products. Collaborate effectively with circuit designers and verification teams to meet challenging design specifications and project milestones. Contribute to the overall success and reputation of the Logic Libraries IP group through your technical excellence and teamwork. Mentor and support junior team members, fostering a culture of knowledge-sharing and continuous improvement. What You ll Need: Bachelor s or master s degree in electronics engineering or a related field. Minimum2 years of hands-on experience in standard cells layout design for digital circuits. Proficiency with industry-standard EDA tools, including Cadence Virtuoso or Synopsys Custom Compiler. Deep knowledge of layout design methods, techniques, and methodologies for high-performance and robust standard cells. Experience with physical verification tools such as ICC2, including DRC and LVS checks. Strong analytical and systematic problem-solving skills, with a detail-oriented mindset. Ability to work effectively in a collaborative, team-driven environment. Excellent communication and interpersonal skills, with a willingness to learn and share knowledge. Who You Are: A collaborative team player who values open communication and shared goals. Detail-oriented, with a commitment to delivering high-quality and reliable work. Curious and proactive, embracing continuous learning and professional development. Adaptable and resilient in the face of technical challenges and evolving requirements. Passionate about innovation, with a drive to improve processes and methodologies. Self-motivated, organized, and able to manage multiple priorities in a fast-paced environment. The Team You ll Be A Part Of: You ll join a dynamic and supportive Logic Libraries IP group focused on developing state-of-the-art standard cell libraries for advanced SOC subsystems. Our team thrives on collaboration, innovation, and technical excellence. We value diverse perspectives and foster an inclusive environment where every member s contributions are recognized and celebrated. Together, we drive the success of Synopsys IP solutions, setting industry benchmarks and enabling our customers to achieve next-generation performance . Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Applications Engineering, Staff Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12154 Remote Eligible No Date Posted 14/07/2025 We Are: You Are: You are an adaptable, solutions-oriented professional with a passion for leveraging technology to solve complex challenges. With a deep technical foundation and a keen understanding of customer needs, you thrive at the intersection of engineering and client engagement. You have a strong background in semiconductor design, EDA tools, or software development, and you re eager to apply your expertise in a dynamic, high-impact environment. As a natural communicator and collaborator, you build rapport quickly with both technical and non-technical stakeholders, translating intricate technical concepts into actionable solutions. Your curiosity drives you to stay on top of industry trends and continuously expand your skill set, while your attention to detail ensures that solutions are robust, scalable, and tailored to each customer s unique requirements. You enjoy working in diverse teams and value inclusivity, believing that the best outcomes result from a variety of perspectives and experiences. Your proactive approach means you anticipate customer needs and are always looking for ways to enhance their success. Resilient and resourceful, you handle ambiguity with confidence and learn quickly from new challenges. Above all, you are driven by a desire to make a tangible impact both for your customers and for the broader technology ecosystem. Physical Design Specialist for the role of Staff Application Engineer - Partner with leading customers to develop and implement advanced AI-driven RTL-to-GDS methodologies using Synopsys EDA tools, IPs and libraries. - Create and optimize flows and solutions to meet PPA requirements for high-frequency cores, automotive designs, and high-capacity AI and compute designs. - Enable the flows/solutions utilizing Synopsys tools like Fusion Compiler, RTL Architect, and AI-based Design Space Optimization engines, along with Tcl/Python scripting. - Collaborate with Customers, R&D and other teams for innovative solution and feature development. Key Qualifications: - Bachelor s in Electrical Engineering, Computer Engineering, or in related field having 5+ years of experience. - Comprehensive RTL-to-GDSII flow knowledge and hands-on experience with backend P&R tools (e.g., Fusion Compiler/ICC2). Good experience of physical synthesis, timing closure, CTS, routing at advanced nodes and timing closure. - Excellent verbal/written communication and presentation skills. - Ability to manage multiple priorities and effectively address customer challenges. Who You Are: Exceptional communicator who can convey technical concepts clearly and concisely to diverse audiences. Collaborative team player who thrives in cross-functional environments and values diverse perspectives. Customer-centric mindset with strong relationship-building skills. Proactive, self-motivated, and able to manage multiple priorities in a fast-paced setting. Analytical thinker with a commitment to continuous learning and professional growth. The Team You ll Be A Part Of: You ll join a high-performing, multidisciplinary Applications Engineering team dedicated to delivering exceptional value to our customers. The team collaborates closely with sales, R&D, and product management to ensure customers achieve their design goals using Synopsys world-class solutions. Our focus is on technical excellence, innovation, and building lasting partnerships with clients across the semiconductor ecosystem. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Senior R&D Engineer Hyderabad, Telangana, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development. Play Video Job Description Category Engineering Hire Type Employee Job ID 12216 Remote Eligible No Date Posted 14/07/2025 Alternate Job Titles: Senior R&D Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and driven engineering professional with a strong foundation in VLSI concepts, CMOS circuit design, and EDA tools. With2-3 years of hands-on experience in the semiconductor industry, you thrive in dynamic environments where innovation, collaboration, and continuous learning are valued. Your curiosity drives you to explore emerging technologies such as AI/ML, and you have developed proficiency in scripting languages like TCL and Python to solve complex engineering challenges. You have a keen eye for detail and a solid grasp of timing, power, and noise analysis, enabling you to deliver robust and reliable design solutions. Your exposure to industry-standard tools such as VCS, Design Compiler, Primetime, and HSPICE/Primesim has honed your technical expertise, and you are comfortable navigating various stages of the design flow, from synthesis to signoff. As a team player, you communicate effectively, share knowledge openly, and support your peers in achieving shared goals. You value diversity, equity, and inclusion, and are eager to contribute to a culture that fosters creativity and personal growth. If you are ready to challenge yourself, make an impact, and be part of a world-class engineering team, Synopsys is the place for you. What You ll Be Doing: Developing and maintaining scripts and automation flows using TCL, Python, and Make to streamline EDA tool operations and design processes. Performing advanced timing, power, and noise analysis on CMOS circuits, leveraging your understanding of setup/hold constraints and leakage concepts. Contributing to the characterization of standard cell libraries, including NLDM/CCSN and LVF methodologies, and ensuring accurate modeling for signoff. Collaborating with design, verification, and methodology teams to optimize PPA (Power, Performance, Area) and address STA (Static Timing Analysis) challenges. Utilizing tools such as VCS, Design Compiler, Primetime, and HSPICE/Primesim to support verification, synthesis, and signoff activities. Participating in root cause analysis of timing and power issues, implementing innovative solutions, and documenting best practices for future projects. Staying abreast of the latest trends in AI/ML and exploring their application in EDA tool flows and design optimization. The Impact You Will Have: Accelerate the delivery and quality of Synopsys IP and design solutions through automation and process innovation. Enhance product reliability by ensuring precise timing and power characterization, directly influencing customer satisfaction. Drive cross-functional collaboration, sharing insights and solutions that elevate team performance and project outcomes. Contribute to the adoption of cutting-edge AI/ML techniques, positioning Synopsys as a leader in intelligent EDA workflows. Reduce design cycle times and resource bottlenecks through effective scripting and workflow optimization. Mentor and support junior engineers, fostering a culture of knowledge sharing and continuous improvement. What You ll Need: 2-3 years of experience in VLSI design, EDA tool flows, or related semiconductor engineering roles. Proficiency in TCL, Python, and Make for scripting and automation. Strong understanding of CMOS circuit fundamentals, including timing (setup/hold), power (leakage/dynamic), and noise analysis. Experience with cell library characterization methodologies (NLDM/CCSN, LVF) and familiarity with library constructs and syntax. Working knowledge of STA analysis, PPA trends, and basic understanding of PNR (Place & Route). Hands-on experience with EDA tools: VCS, Design Compiler, Primetime, HSPICE/Primesim. Who You Are: Analytical thinker with strong problem-solving skills and a passion for innovation. Effective communicator, able to collaborate across disciplines and share complex ideas clearly. Self-motivated and adaptable, eager to learn new technologies and methods. Detail-oriented with a commitment to delivering high-quality results under tight deadlines. Team player who values diversity, equity, and inclusion in the workplace. The Team You ll Be A Part Of: You will join a vibrant team of R&D engineers focused on advancing the state of the art in chip characterization, timing, and power analysis. Our team collaborates closely with cross-functional partners in design, verification, and methodology to deliver next-generation semiconductor solutions. We foster a culture of innovation, mentorship, and continuous improvement, ensuring every member has an opportunity to grow and make a meaningful impact. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Hyderabad View Map Hiring Journey at Synopsys Apply As an applicant your resume, skills, and experience are being reviewed for consideration. Phone Screen Once your resume has been selected a recruiter and/or hiring manager will reach out to learn more about you and share more about the role. Interview You will be invited to meet with the hiring team to measure your qualifications for the role. Our interviews are held either in person or via Zoom. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Company Overview Group/Division With over 40 years of semiconductor process control experience, chipmakers around the globe rely on KLA to ensure that their fabs ramp next-generation devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLAs Global Products Group (GPG), which is responsible for creating all of KLA s metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. The Film and Scatterometry Technology (FaST) Division provides industry leading metrology solutions for worldwide semiconductor IC manufacturers. The FaST Division portfolio of metrology products includes hardware and software solutions for optical film thickness, optical critical dimension (CD), composition, and resistivity measurement systems. These products are essential for the IC manufacturers as they provide critical metrology capabilities for the development and implementation of their advanced IC processes. The FaST division is committed to support our customers to achieve performance entitlement of our solution and we effectively partner with our customers from their early research and development phase to the high volume in-line manufacturing implementation specific for their process needs. The division consists of a global team located in US, Israel, China, and India. Job Description/Preferred Qualifications Essential Responsibilities: 1. Acquire and demonstrate technical knowledge of Common Film Shape software. 2. Perform requirements analysis, software design, development and unit testing 3. Participate in requirements definition and review process. Provide Technical assessment of the impact of any changes to product requirements. 4. Providing technical expertise to the estimation process as input to the project plan 4. Acquire knowledge of key use cases in Optical Film/CD Metrology 5. Follow KT defined software development processes (CMM) 6. Understand and make changes to existing software. 7. In conjunction with the technical Lead, highlights, reviews and mitigates technical risks 8. Contributes to the continued improvement of the organizations development procedures, by looking for opportunities for improvement and proposing ideas for solution. 9.Ensuring that detailed designs, code, and unit tests are consistent, robust, future-proof and scalable. Qualifications/Requirements: 1. Required: BE/BS/BTech degree with 2 or more years of SW experience. 2. Required: Strong in programming fundamentals, C++, VC++, MFC 3. Required: Thorough knowledge of SDLC and software engineering 4. Required: Experience in analysis, design, development and unit testing 5. Required: Must be able to interact and communicate with all levels of staff and project management in both the business and the technical areas, with the ability to keep discussions at the appropriate level of abstraction. 6. Required: Possess excellent analytical, problem solving, organizational, interpersonal, and motivational skills, with the ability to move cleanly from theoretical to implementation thinking. 6. Required: Willingness to travel to US and other customer places on short assignments. 7. Preferred: Experience in developing COM/DCOM using MFC/ATL 8. Preferred: Experience in .Net and C# 9.Preferred: Experience leading teams or potential to grow into a lead engineer in an years time 10.Optional: Knowledge of CMM or other process models 11.Optional: Knowledge of KT specific or general semiconductor domain Minimum Qualifications Masters Level Degree and 0 years related work experience; Bachelors Level Degree and related work experience of 2 years

Summary / Role Purpose As Senior Application Engineer, you will be part of the team deploying Ansys EDA products with a primary focus on RedHawk-SC for Power Integrity and EMIR signoff across all top Semiconductor companies. This involves working with Software developers, Architects, & Product Specialists to get the product developed, and deploy it on leading edge SoCs across Semiconductor companies. Key focus areas will include all areas related to IP/SoC/3DIC Power Integrity, Signal Integrity, Reliability aspects like EM/ESD/Thermal, Advanced timing/jitter, Packaging - the top challenges for any chip design on advanced nodes like 7/5/3/2 nm. Key Duties and Responsibilities Be a senior member of Application Engineering Team that Works with Global-Customers / IP-providers / Foundries to understand design challenges of cutting-edge SoCs & 3DICs on 7/5/3/2 nm and creates EDA product specifications. Works with Product development team to get state-of-the-art EDA products developed. Works on Ansys-Seascape platform - Semiconductor Industrys First and Only True Big-Data design Platform! Works with top Semiconductor companies around the globe to deploy EDA products for solving Power/Signal/Reliability challenges across Chip-Package-System. Works on RedHawk and RedHawk-SC to help users and to perform EMIR/power-integrity sign-off analysis. Provides expert guidance / consultation to Customers around the globe for solving design challenges. Minimum Education/Certification Requirements and Experience Bachelors or Masters degree (B. Tech/M. Tech/BS/MS) in Electrical or Electronics Engineering from a recognized institution. Minimum 3 years of industry experience in Power Integrity / Signal Integrity / EMIR signoff with Redhawk-SC hands-on knowledge. Strong problem-solving skills. Good programming skills. Excellent verbal and written communication skills Preferred Qualifications and Skills Passion to learn and deploy new technologies. Ability for minimal travel At Ansys, we know that changing the world takes vision, skill, and each other. We fuel new ideas, build relationships, and help each other realize our greatest potential. We are ONE Ansys. We operate on three key components: our commitments to stakeholders, our values that guide how we work together, and our actions to deliver results. As ONE Ansys, we are powering innovation that drives human advancement Our Commitments: Amaze with innovative products and solutions Make our customers incredibly successful Act with integrity Ensure employees thrive and shareholders prosper Our Values: Adaptability: Be open, welcome what s next Courage: Be courageous, move forward passionately Generosity: Be generous, share, listen, serve Authenticity: Be you, make us stronger Our Actions: We commit to audacious goals We work seamlessly as a team We demonstrate mastery We deliver outstanding results

About the Company: Founded with the vision of building a runtime reconfigurable, future-proof processor, Morphing Machines is a fabless semiconductor company working on a ground-breaking technology that will transform the chip design landscape. Morphing Machines patent protected IP, REDEFINE, can concurrently accelerate heterogenous workloads, on a homogenous fabric of processing cores. REDEFINE combines ASIC (Application Specific Integrated Circuit) like performance with the reconfigurability of FPGAs (Field Programmable Gate Arrays). Morphing Machines innovation enables dataflow compute, which is a paradigm shift in the current processor industry. Due to the nature of our architecture, we can cater across domains from Data Centers, Quantitative Finance, AI/ML acceleration, Edge Vision to High Performance Compute (HPC) applications, all with the same hardware fabric. At Morphing Machines, we are building a cutting-edge technology guided by our vision to build truly software-defined hardware. Job Overview : As the Senior Compiler Engineer, you will be responsible for leading the development of a compiler toolchain for the REDEFINE accelerator, including an MLIR-based graph compiler for AI-ML frameworks. You will work closely with cross-functional teams, including hardware engineers, software developers, and system architects, to ensure the seamless integration of the REDEFINE accelerator with the software ecosystem. Your expertise in compiler development, programming languages, and AI-ML frameworks will be essential in building a powerful and developer-friendly software toolchain. Requirements : Graph Compiler Development: Lead the development of a graph compiler for AI-ML applications, enabling efficient execution of complex neural network models on the REDEFINE accelerator. Design and implement compiler optimizations, code transformations, and scheduling techniques to maximize performance and resource utilization. Collaborate with the hardware and system architecture teams to understand accelerator capabilities and optimize the compiler for specific hardware features. Software Toolchain Development: Contribute to the overall development of the software toolchain for the REDEFINE accelerator, including compilers, runtime environments, and libraries. Collaborate with the system software and runtime teams to optimize the interaction between the compiler and runtime components. Ensure developer-friendly features like debugging support, profiling, and performance analysis tools. Performance Analysis and Optimization: Conduct performance analysis and optimization of the compiler, graph compiler, and intermediate abstraction layer. Collaborate with the hardware and system teams to identify opportunities for performance improvements and software-hardware co-optimizations. Stay updated with the latest advancements in compiler techniques, programming languages, and AI-ML frameworks to drive continuous improvement. Collaboration and Documentation: Collaborate closely with hardware, software, and system teams to ensure seamless integration and compatibility. Document design decisions, algorithms, and optimizations to facilitate knowledge sharing and future development. Provide technical guidance and mentorship to junior team members, fostering a culture of innovation and learning. Qualifications : Masters or Ph.D. degree in Computer Science, Electrical Engineering, or a related field. Proven experience (5+ years) in LLVM/MLIR-based compiler development, particularly in graph compilers for AI-ML applications. Familiarity with AI-ML frameworks like TensorFlow, PyTorch, or ONNX and their compiler integration. Experience with vectorization and parallel programming models such as OpenMP, SYCL, CUDA, or GPGPU programming. Solid understanding of hardware-software co-design principles and performance optimization techniques. Strong analytical and problem-solving abilities. Excellent communication and collaboration skills. Ability to thrive in a fast-paced startup environment. Apply Now

About the Company: Founded with the vision of building a runtime reconfigurable, future-proof processor, Morphing Machines is a fabless semiconductor company working on a ground-breaking technology that will transform the chip design landscape. Morphing Machines patent protected IP, REDEFINE, can concurrently accelerate heterogenous workloads, on a homogenous fabric of processing cores. REDEFINE combines ASIC (Application Specific Integrated Circuit) like performance with the reconfigurability of FPGAs (Field Programmable Gate Arrays). Morphing Machines innovation enables dataflow compute, which is a paradigm shift in the current processor industry. Due to the nature of our architecture, we can cater across domains from Data Centers, Quantitative Finance, AI/ML acceleration, Edge Vision to High Performance Compute (HPC) applications, all with the same hardware fabric. At Morphing Machines, we are building a cutting-edge technology guided by our vision to build truly software-defined hardware. Role Overview: As the Senior FPGA Engineer, you will play a mission-critical role in integrating FPGA designs on both cloud-hosted (AWS F1/F2) and on-premise FPGA platforms. You will own the entire lifecycle of FPGA bring-up, from IP handoff and integration to multi-fabric orchestration and performance validation. You will work closely with product, compiler, and orchestration teams to ensure FPGA-resident applications can be easily deployed, monitored, and benchmarked. Your responsibilities will include validating bitstreams, implementing communication pipelines, and enabling test/demo infrastructure across compute fabrics implemented over various FPGA s. Key Responsibilities: FPGA Bring-Up & Bitstream Integration Interface with the IP team to integrate design drops into deployable bitstreams. Bring up bitstreams on AWS F1/F2 instances, Xilinx VCU platforms, or other compatible boards. Debug issues related to I/O wrapper logic, timing, etc. Platform and Tooling Integration Work with Switchboard and FireSim environments to support application execution across multiple FPGA boards. Contribute to building a Continuous Integration/Deployment (CI/CD)-like pipeline for FPGA validation and test deployment. Establish protocols to bring up and manage multi-FPGA topologies. Application Enablement and Profiling Support application developers in deploying and profiling workloads coded in C with Hardware specific pragmas on FPGA targets. Validate compute vs communication tradeoffs; capture latency, throughput, and power KPIs. Enable applications such as voxel pooling, BFS, and encrypted inference. Documentation and Enablement Document the end-to-end FPGA bring-up workflow, including toolchains, setup guides, debug logs, and issue trackers. Required Skills and Qualifications: Technical Skills: Strong experience with Xilinx toolchains (Vivado, Vitis) , FPGA flows and implementation of design across FPGA boards Hands-on exposure to cloud-based FPGA platforms such as AWS F1/F2 Solid understanding of RTL development using Verilog/SystemVerilog Familiarity with memory controllers, timing analysis, and interface protocols Tooling & Workflow Integration: Experience with FPGA integration in CI/CD environments Knowledge of simulation and emulation frameworks Understanding of software-hardware co-design and ability to assist with application bring-up (C/C++) Soft Skills: Strong debugging and problem-solving skills Comfortable working in fast-paced, ambiguous environments Excellent communication and collaboration skills Ability to take ownership of integration across multiple teams Education and Experience: Bachelor s or Master s degree in Electronics, Electrical, or Computer Engineering 10+ years experience in FPGA bring-up, hardware integration, or system-level FPGA projects Preferred Skills (Bonus): Experience with Switchboard, FireSim, or multi-fabric orchestration Familiarity with compiler-level hardware mapping Understanding of OpenCL, LLVM, or machine-generated IR flows Ability to assist in building test infrastructure for cloud FPGA CI/CD Apply Now

Requisition #: 17089 Our Mission: Powering Innovation That Drives Human Advancement When visionary companies need to know how their world-changing ideas will perform, they close the gap between design and reality with Ansys simulation. For more than 50 years, Ansys software has enabled innovators across industries to push boundaries by using the predictive power of simulation. From sustainable transportation to advanced semiconductors, from satellite systems to life-saving medical devices, the next great leaps in human advancement will be powered by Ansys. Innovate With Ansys, Power Your Career. Summary / Role Purpose As Senior Application Engineer, you will be part of the team deploying Ansys EDA products with a primary focus on RedHawk-SC for Power Integrity and EMIR signoff across all top Semiconductor companies. This involves working with Software developers, Architects, & Product Specialists to get the product developed, and deploy it on leading edge SoCs across Semiconductor companies. Key focus areas will include all areas related to IP/SoC/3DIC Power Integrity, Signal Integrity, Reliability aspects like EM/ESD/Thermal, Advanced timing/jitter, Packaging - the top challenges for any chip design on advanced nodes like 7/5/3/2 nm. Key Duties and Responsibilities Be a senior member of Application Engineering Team that Works with Global-Customers / IP-providers / Foundries to understand design challenges of cutting-edge SoCs & 3DICs on 7/5/3/2 nm and creates EDA product specifications. Works with Product development team to get state-of-the-art EDA products developed. Works on Ansys-Seascape platform - Semiconductor Industrys First and Only True Big-Data design Platform! Works with top Semiconductor companies around the globe to deploy EDA products for solving Power/Signal/Reliability challenges across Chip-Package-System. Works on RedHawk and RedHawk-SC to help users and to perform EMIR/power-integrity sign-off analysis. Provides expert guidance / consultation to Customers around the globe for solving design challenges. Minimum Education/Certification Requirements and Experience Bachelors or Masters degree (B.Tech/M.Tech/BS/MS) in Electrical or Electronics Engineering from a recognized institution. Minimum 3 years of industry experience in Power Integrity / Signal Integrity / EMIR signoff with Redhawk-SC hands-on knowledge. Strong problem-solving skills. Good programming skills. Excellent verbal and written communication skills Preferred Qualifications and Skills Passion to learn and deploy new technologies. Ability for minimal travel At Ansys, we know that changing the world takes vision, skill, and each other. We fuel new ideas, build relationships, and help each other realize our greatest potential. We are ONE Ansys. We operate on three key components: our commitments to stakeholders, our values that guide how we work together, and our actions to deliver results. As ONE Ansys, we are powering innovation that drives human advancement Our Commitments: Amaze with innovative products and solutions Make our customers incredibly successful Act with integrity Ensure employees thrive and shareholders prosper Our Values: Adaptability: Be open, welcome what s next Courage: Be courageous, move forward passionately Generosity: Be generous, share, listen, serve Authenticity: Be you, make us stronger Our Actions: We commit to audacious goals We work seamlessly as a team We demonstrate mastery We deliver outstanding results VALUES IN ACTION Ansys is committed to powering the people who power human advancement. We believe in creating and nurturing a workplace that supports and welcomes people of all backgrounds; encouraging them to bring their talents and experience to a workplace where they are valued and can thrive. Our culture is grounded in our four core values of adaptability, courage, generosity, and authenticity. Through our behaviors and actions, these values foster higher team performance and greater innovation for our customers. We re proud to offer programs, available to all employees, to further impact innovation and business outcomes, such as employee networks and learning communities that inform solutions for our globally minded customer base. WELCOME WHAT S NEXT IN YOUR CAREER AT ANSYS At Ansys, you will find yourself among the sharpest minds and most visionary leaders across the globe. Collectively, we strive to change the world with innovative technology and transformational solutions. With a prestigious reputation in working with well-known, world-class companies, standards at Ansys are high met by those willing to rise to the occasion and meet those challenges head on. Our team is passionate about pushing the limits of world-class simulation technology, empowering our customers to turn their design concepts into successful, innovative products faster and at a lower cost. Ready to feel inspired? Check out some of our recent customer stories, here and here . At Ansys, it s about the learning, the discovery, and the collaboration. It s about the what s next as much as the mission accomplished. And it s about the melding of disciplined intellect with strategic direction and results that have, can, and do impact real people in real ways. All this is forged within a working environment built on respect, autonomy, and ethics. CREATING A PLACE WE RE PROUD TO BE Ansys is an S&P 500 company and a member of the NASDAQ-100. We are proud to have been recognized for the following more recent awards, although our list goes on: Newsweek s Most Loved Workplace globally and in the U.S., Gold Stevie Award Winner, America s Most Responsible Companies, Fast Company World Changing Ideas, Great Place to Work Certified (China, Greece, France, India, Japan, Korea, Spain, Sweden, Taiwan, and U.K.). For more information, please visit us at www.ansys.com Ansys is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, and other protected characteristics. Ansys does not accept unsolicited referrals for vacancies, and any unsolicited referral will become the property of Ansys. Upon hire, no fee will be owed to the agency, person, or entity.