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2.0 - 4.0 years
0 Lacs
hyderabad, telangana, india
On-site
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Development, automation and maintenance of EDA flows and scripts for physical implementation Develop TFM to optimize PPA for IP's and Soft Controllers PPA characterization and optimization of flow for performance-oriented and power-oriented best-in-class IP cores in advanced process nodes, on TSMC, Intel, Samsung and Rapidus Foundries Manage regression infrastructure that tracks quality of the RTL/flow development as well as the PPA of the key designs. Digital design implementation using Cadence EDA tools - Genus, Innovus, Conformal, Litmus, Tempus, Voltus, Certus, Pegasus and other ...
Posted 2 days ago
2.0 - 4.0 years
0 Lacs
hyderabad, telangana, india
On-site
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Development, automation and maintenance of EDA flows and scripts for physical implementation Develop TFM to optimize PPA for IP's and Soft Controllers PPA characterization and optimization of flow for performance-oriented and power-oriented best-in-class IP cores in advanced process nodes, on TSMC, Intel, Samsung and Rapidus Foundries Manage regression infrastructure that tracks quality of the RTL/flow development as well as the PPA of the key designs. Digital design implementation using Cadence EDA tools - Genus, Innovus, Conformal, Litmus, Tempus, Voltus, Certus, Pegasus and other ...
Posted 2 days ago
2.0 - 4.0 years
0 Lacs
hyderabad, telangana, india
On-site
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Work with RnD on developing and pioneering Agentic AI capabilities to optimize PPA for IP's and Soft Controllers to have the best-in-class IP cores in advanced process nodes, on TSMC, Intel, Samsung and Rapidus Foundries. Development, automation and maintenance of EDA flows and scripts for physical implementation Manage regression infrastructure that tracks quality of the RTL/flow development as well as the PPA of the key designs. Required skills Educational Qualification: MS/MTech/BE/ BTech in Electronics from reputed institutes with 2 + years experience Physical design experience i...
Posted 2 days ago
2.0 - 4.0 years
0 Lacs
hyderabad, telangana, india
On-site
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Development, automation and maintenance of EDA flows and scripts for physical implementation Develop TFM to optimize PPA for IP's and Soft Controllers PPA characterization and optimization of flow for performance-oriented and power-oriented best-in-class IP cores in advanced process nodes, on TSMC, Intel, Samsung and Rapidus Foundries Manage regression infrastructure that tracks quality of the RTL/flow development as well as the PPA of the key designs. Digital design implementation using Cadence EDA tools - Genus, Innovus, Conformal, Litmus, Tempus, Voltus, Certus, Pegasus and other ...
Posted 3 days ago
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