Std. Cell/ Layout Engineers Digicomm Semiconductor

3.0 - 7.0 years

0 Lacs

karnataka

On-site

As a Standard Cell Library Developer with 3+ years of relevant experience, you will be responsible for designing and optimizing standard cell libraries that contain logic gates like AND, OR, NAND, NOR, Flip-Flops with various drive strengths and functionality options. You will characterize standard cells by conducting static timing analysis (STA) to evaluate delay, power consumption, and other performance metrics under different process corners and operating conditions. Custom cell design will be required to create specialized standard cells for unique design requirements. Your role will involve generating physical layouts for standard cells using layout design tools such as Cadence Virtuoso and Synopsys IC Compiler. Running design rule checking (DRC) and layout versus schematic (LVS) verification will be essential to ensure that standard cell layouts comply with manufacturing design rules and match their schematics. Additionally, you will be responsible for characterizing and validating standard cell libraries for various technology nodes, ensuring consistency and accuracy. Implementing low-power standard cells with features like power gating and voltage scaling to optimize power consumption will be part of your responsibilities. You will need to address challenges specific to advanced process nodes like FinFET and multi-patterning when designing and optimizing standard cells. Collaboration with manufacturing teams will be necessary to guarantee that standard cell layouts are manufacturable, considering lithography, process variation, and yield. Maintaining detailed documentation of standard cell libraries, including timing models, power models, and layout guidelines, will be crucial. Your role will also involve working with digital design teams to integrate standard cell libraries into the overall chip design, ensuring seamless functionality and compatibility.,

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Battery Validation Engineer Caratlane

3.0 - 6.0 years

4 - 8 Lacs

Pune, Maharashtra, India

On-site

Any Graduate/Post-Graduate Degree in C Mechatronics, EE, Instrumentation, Mechanical engineering 60% above in academics Responsibility: Battery pack , Module and Cell Validation planning Test Specification finalization Test data verification Coordination with Supplier for Testing specs and methodology Requirements: Experience in Battery component validation Experience is creation of test specifications and Standards Know how of Li-Ion Battery Cells and specifications Automotive experience Knowledge of Testing Standards for Cells and Batteries Good Communication and presentation skills Good Analytical skills Good Knowhow of data analysis topics and tools Knowhow of python is mandatory

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Battery Validation Engineer Caratlane

4.0 - 6.0 years

4 - 8 Lacs

Pune, Maharashtra, India

On-site

Educational Qualification: Graduate/Post Graduate in Automobile/ Mechanical Engineering Relevant Experience: Battery Testing and Validation RESPONSIBILITIES: Batterypack , Module and Cell Validation planning Test Specification finalisation Test data verification Coordination with Supplier for Testing specs and methodology REQUIREMENTS: Experience in Battery component validation Experience is creation of test specifications and Standards Know how of Li-Ion Battery Cells and specifications Automotive experience Knowledge of Testing Standards for Cells and Batteries Good Communication and presentation skills Good Analytical skills

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Staff/Sr Staff Product Engineer - SPICE Synopsys

5.0 - 10.0 years

3 - 9 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

* Diagnose problem, understand customer requirements and propose new enhancements for product improvement. * Support Benchmarking/customer engagements * Perform internal testing along release cycles * Prepare usage specification for new projects * Prepare and Deliver Product training/presentation/demos Qualifications and Experience * 5+ year Transistor level circuit simulation or support experience. * Experience in Standard Cell design, IO Cell design or Custom Cell design. * Experience in Std Cell/IO Cell/Custom Cell characterization * Solid understanding of SPICE simulation with industry-standard simulators * Knowledge of simulation environment integration is desirable. * Excellent communication and presentation skills, problem solving, and project management skills as well as ability to interface with customers and developers are essential. * Education: BSEE or equivalent with 5+ years (or MS/Ph.D. with 3+ years) of relevant experience

Posted 2 months ago

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