6.0 - 10.0 years

0 Lacs

chennai, tamil nadu

On-site

As an experienced FPGA Sr. Design Engineer with strong expertise in 5G or ORAN technologies, your role will involve designing, implementing, and testing FPGA-based hardware systems along with R&D activities for proof-of-concept demonstrations. Key Responsibilities: - Implement FPGA code on target hardware and test with system components/software. - Perform RTL Design, Implementation, Testing, Integration, and delivery of FPGA-based systems. - Participate in R&D for aerospace-related design techniques. Qualification Required: - BE/B.Tech/M.E/M.Tech or equivalent. Domain Expertise: - Proficient in FPGA design flows using Xilinx tools (compilation, simulation, synthesis, debugging, optimization...

Posted 1 month ago

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FPGA Senior Design Engineer Capgemini Engineering

5.0 - 9.0 years

0 Lacs

chennai, tamil nadu

On-site

Your Role As a Senior FPGA Design Engineer at NEC Mobile Network Excellence Center (NMEC), Chennai, you will be responsible for designing, implementing, and testing FPGA-based hardware systems for Datacom and Aerospace applications. You will work closely with cross-functional teams to integrate system components and demonstrate proof-of-concept designs in advanced technologies. In this role, you will: - Implement FPGA code on target hardware and test with system components and software. - Perform RTL design, implementation, testing, and integration of FPGA-based systems. - Deliver high-performance hardware solutions for Datacom and Aerospace applications. - Participate in R&D activities to d...

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Clocking/Constraints/STA Lead HCLTech

10.0 - 14.0 years

0 Lacs

hyderabad, telangana

On-site

We are looking for a highly experienced Clocking/Constraints/STA Lead to join our Physical Design team. In this critical leadership role, you will not only be responsible for your own technical expertise but also for guiding and mentoring a team of engineers to achieve exceptional timing closure for our IC designs. Lead the development and implementation of comprehensive clocking strategies for high-performance ICs. Define and manage timing constraints throughout the design flow, ensuring accurate and consistent timing analysis. Perform advanced Static Timing Analysis (STA) using industry-standard tools, identifying potential timing violations and bottlenecks. Develop and maintain robust clo...

Posted 3 months ago

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