462 Cdc Jobs - Page 13

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Job Function/General Responsibilities Modeling and Minimizing SOC power for Games/ML/UI/Image-processing Graphics workloads Silicon power measurement and modeling CPU, memory and other SOC components of SOC for Graphics workloads Experience in GPU DCVS algorithm is a plus Knowledge of Windows OS is a plus. Critical "Must Have" skills/experience for role Bachelor's degree or equivalent in Electrical or Computer Engineering, Computer Science, or related field. 15+ years Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. Minimum Qualifications: Bachelor's degree in Eng...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Hands on experience in Multi Clock designs, Asynchronous inter...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: 8 to 11 years of work experience in ASIC/SoC Design Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Hands on e...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: 15+ years of experience in SoC design Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interfac...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Minimum 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FVExperience in Logic design/micro-architecture/RTL coding is a must.Must have hands on experience with design and integration of complex multi clock domain blocksExperience in Verilog/System-Verilog is a must.Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architectureHands on experience in Multi Clock designs, Asynchronous interface is a must.Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.Work closely with the Design verification and va...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Responsibilities will include to be strong designer who is able to work independent on one of the peripheral IPs come up with design and microarchitecture solutions guide/mentor juniors engage with external teams to drive/resolve cross team dependencies. Take complete responsibility of one or more project and drive that independently. Being able to make schedule estimates is a plus. People management experience is a plus Skills & Requirements needed 3-6 years of work experience in ASIC IP cores design RequiredBachelor's, Electrical Engineering PreferredMaster's, Electrical Engineering Knowledge of AMBA pro...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience 2 to 20 years Qualcomm's Bangalore WLAN PHY (Baseband) team is seeking VLSI Digital Design Engineers to lead IP development for the latest WiFi standards. Our WLAN PHY team, comprised of highly passionate and seasoned domain experts, prides itself on years of experience in taking WLAN PHY designs from concept to silicon independently. WLAN PHY team is responsible for delivering the end-to-end Tx/Rx DSP chains- all the way from antenna samples post ADC to raw bits for upper layers and on the reverse path from raw bits to DAC. The team specializes in working with challenges of practical high-speed...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary Join Qualcomms Wireless IP team to design and develop cutting-edge RTL for next-generation cellular and Wi-Fi modem IPs used in mobile, wearable, and IoT platforms. You will work on high-performance, low-power digital designs across the full VLSI development cycle"”from architecture and micro-architecture to RTL implementation and SoC integration. This role offers the opportunity to collaborate with global teams and contribute to market-leading wireless solutions. Key Responsibilities Design and implement RTL for wireless modem IPs and SoC subsystems using Verilog/SystemVerilog. Develop mic...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

As an ETL Developer for the Data and Analytics team, at Guidewire you will participate and collaborate with our customers and SI Partners who are adopting our Guidewire Data Platform as the centerpiece of their data foundation. You will facilitate and be an active developer when necessary to operationalize the realization of the agreed upon ETL Architecture goals of our customers adhering to Guidewire best practices and standards. You will work with our customers, partners, and other Guidewire team members to deliver successful data transformation initiatives. You will utilize best practices for design, development, and delivery of customer projects. You will share knowledge with the wider G...

Role Overview Seeking a highly skilled Kafka Developer with deep expertise in Kafka KSQL Streams-based transformations and hands-on experience working with Oracle, MS SQL, and PostgreSQL databasesespecially in environments with non-standard schemas (e.g., tables without primary keys, with/without constraints, and foreign keys). The ideal candidate will be responsible for designing and implementing scalable, real-time data pipelines and ensuring robust CDC (Change Data Capture) mechanisms for incremental data replication. Key Responsibilities • Design and implement Kafka Streams and KSQL-based transformations for real-time data processing. • Develop and maintain CDC pipelines using Kafka Conn...

Mandatory Skills: ASIC Design Primary Skills:RTL, Coding, Design, IP Design, SOC Development, Lint, CDC, Micro Architecture Experience in: PCIe/DDR/Ethernet Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium Make flow, Perl, Shell, Python I2C, UART/SPI

Hiring now Criteria - B.Tech below 2022 and M.Tech below 2024 Location - Bangalore Preferred Engineers who have completed their Training in #VLSI domains for below requirements #PD #AL #RTL #DFT Share profiles to kartikchandu@juntrantech.com Health insurance Provident fund

Design, develop, and implement machine learning models and statistical algorithms.Analyze large datasets to extract meaningful insights and trends.Collaborate with stakeholders to define business problems and deliver data-driven solutions.Optimize and scale machine learning models for production environments.Present analytical findings and recommendations in a clear, actionable manner.Key Skills:Proficiency in Python, R, and SQL.Experience with ML libraries like TensorFlow, PyTorch, or Scikit-learn.Strong knowledge of statistical methods and data visualization tools.Excellent problem-solving and storytelling skills

Job Title: RTL Design Engineer Work Mode: Hybrid Location: Noida Job Description • Work together with system architects and micro architects to define high level specifications that are implementable. • Contribute to RTL development including running tool flows like lint, CDC, Conformal low power and DFT checks • Work closely with functional verification teams on test-plan development and debug. • Understand timing constraints, run synthesis and deliver synthesized netlist to PD team and provide constraints support for PD teams. • UPF writing, power aware equivalence checks and low power checks. • Collaborate with other functional teams including DFT, physical design and emulation teams to a...

Qualcomm India Private Limited is seeking a Software Engineer with expertise in various aspects of System on Chip (SoC) architecture and design. In this role, you will be responsible for working with AMBA protocols such as AXI, AHB, and APB, as well as SoC clocking, reset, debug architecture, and peripherals like USB, PCIE, and SDCC. An understanding of Memory controller designs and microprocessors is considered an added advantage for this position. As a Software Engineer at Qualcomm, you will be required to have hands-on experience in constraint development and timing closure. Additionally, you will collaborate closely with the SoC verification and validation teams for pre/post Silicon debu...

Overview The Tech Strategy & Enterprise Solutions Consumer Capability at PepsiCo drives personalization at scale by leveraging best-in-class technology stack. The team elevates consumer engagement through Salesforce Marketing Cloud, Data Cloud, MCP, and Service Cloud, enabling targeted campaigns and loyalty initiatives. Responsibilities Collaborate with cross-functional teams, including Business Analysts, Product Owners, and IT teams, to deeply understand Salesforce functionalities, assess risks, and develop robust solutions aligned with business requirements. Govern and maintain compliance with standards, including ISO and CMMI, to ensure alignment with organizational goals. Document soluti...

Role: Kafka Developer Exp: 5+ Years Location: Hyderabad Work Mode: Hybrid Work Type: C2H Date of Join: Immediate to 15days Role Overview Seeking a highly skilled Kafka Developer with deep expertise in Kafka KSQL Streams-based transformations and hands-on experience working with Oracle, MS SQL, and PostgreSQL databasesespecially in environments with non-standard schemas (e.g., tables without primary keys, with/without constraints, and foreign keys). The ideal candidate will be responsible for designing and implementing scalable, real-time data pipelines and ensuring robust CDC (Change Data Capture) mechanisms for incremental data replication. Key Responsibilities Design and implement Kafka St...

Role & responsibilities Please interested candidate send me cv :galeiah.g@honeybeetechsolutions.com Position Name DV Engineer -GLS Position type: Permanent Total Exp: 5-7 years Notice Period: Immediate to 15days Work Location: Bangalore KEY RESPONSIBILITIES: "Key Responsibilities: Develop and implement scalable UVM-based verification environments Lead and execute GLS (Gate-Level Simulation)timing-aware and glitch-sensitive validation is a core part of this role Perform Clock Domain Crossing (CDC) verification using industry-standard methodologies Collaborate cross-functionally with RTL, DFT, and system teams for end-to-end verification closure Analyze waveforms, root-cause issues, and contri...

As a candidate for the role, you should possess a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or have equivalent practical experience. Additionally, you need to have at least 5 years of experience in Application-Specific Integrated Circuit (ASIC) design for test, including managing the silicon life cycle through DFT pattern bring-up on Automatic Test Equipment (ATE) and manufacturing. It is crucial that you have familiarity with ATPG, Low Value (LV), Built-in Self Test (BIST), or Joint Test Action Group (JTAG) tool and flow. Preferred qualifications for this position include proficiency in a programming language such as Pe...

Core Qualifications 12+ years in software/data architecture with hands on experience. Agentic AI & AWS Bedrock (MustHave): Demonstrated handson design, deployment, and operational experience with Agentic AI solutions leveraging AWS Bedrock and AWS Bedrock Agents . Deep expertise in cloud-native architectures on AWS (compute, storage, networking, security). Proven track record defining technology stacks across microservices, event streaming, and modern data platforms (e.g., Snowflake, Databricks). Proficiency with CI/CD and IaC (Azure DevOps, Terraform). Strong knowledge of data modeling, API design (REST/GraphQL), and integration patterns (ETL/ELT, CDC, messaging). Excellent communication an...

As the Cloud Network Subject Matter Expert (SME) at our organization, you will play a critical role in managing network architecture across cloud and on-premise infrastructure. With over 15 years of experience, including at least 10 years in network architecture leadership and 5 years as a cloud network architect, you will be responsible for executing enterprise-scale projects related to data strategy, cloud-based data lakes, API integration, SDWAN, and multi-cloud environments. Your primary focus will be on providing technical expertise in network and enterprise architecture, particularly from a cloud architect's perspective. This will involve leading enterprise-wide network initiatives, co...

We are actively hiring multiple Design Verification (DV) Engineers for Bangalore (hybrid model). If youre looking for a new challenge and can join quickly, youll be among our top-priority candidates! Open Positions : 1. DV Engineer GLS / UVM / SystemVerilog / CDC Experience : 3–8 years Skills : Gate-Level Simulations, UVM testbench development, CDC verification, timing-aware verification 2. DV Engineer – PCIe / DDR / UVM / SV Experience : 4–18 years Skills : Protocol-level verification, PCIe or DDR, UVM, SystemVerilog 3. DV Engineer – UVM / SystemVerilog Experience : 5–10 years Skills : Testbench architecture, functional verification, scalable UVM environments

Front End Integration of Digital, Analog IPs and Subsystems to build complete SoC Netlist. IOMUX and Padring generation and integration. Design of SoC Specific Logic IPs. Perform quality checks like Lint and CDC at SoC level. Implement all feedback from Verification and Physical Design teams for all changes required. Develop SoC level Testbench for RTL and Postlayout Simulations. Collaborate with ATE and Test teams and deliver test patterns for Probe and Package level testing. Support Verification and Post-Silicon Debugging of issues. Experience and Skills Required 10-15 Years Experience in front end integration for complex SoCs. Strong scripting skills. Hands on experience in RTL coding, Li...