Senior Analog Layout Engineer-High Speed Analog Chip TSMC 5nm Best NanoTech

8.0 - 10.0 years

0 Lacs

india

Remote

Job Title: Senior Analog Layout Engineer High-Speed Analog Chip (TSMC 5nm) Experience: 8+ Years Location: Remote / India (must support USA/Canada time zone) Travel: Willing to travel to the U.S. for project release (as required) Role Overview We are looking for a Senior Analog Layout Engineer to work on a high-speed analog chip development in advanced TSMC 5nm technology. The candidate will operate as an individual contributor, responsible for delivering complex high-speed analog and mixed-signal layout blocks with minimal supervision. This role demands deep technical expertise in chip-level integration, bump planning, and ESD implementation, along with a good understanding of circuit simula...

Posted 3 days ago

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PDK Runset/Ruledeck Dev. Intel Corporation

8.0 - 10.0 years

0 Lacs

bengaluru, karnataka, india

On-site

The candidate will be expected to perform Development and support for DRC/LVS/PEX/PERC runset(ruledeck) generation on Intel's process. Development/support of ICV/Calibre/Pegasus/PVS runset (rule deck) for DRC/LVS/PEX/PERC Conduct the L0QA of the codes. Bring in run time efficiency, automation and solve customer issues on rusets. Develop and maintain DRC/LVS/extraction flow, working closely with various design/development groups. Perform in a dynamic and challenging environment with drive and creativity. Candidate Needs To Have B.tech or M.tech with 8+ years of experience in DRC/LVS/PEX/PERC runset development/QA on ICV/Calibre/Pegasus tools/flow. Strong CMOS concepts Strong debugging and scr...

Posted 1 month ago

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