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4.0 - 9.0 years
8 - 15 Lacs
bengaluru, beijing, moscow
Work from Office
Expertise in ASIC or Digital physical design Expertise in RTL2GDSII physical design flows development (SNPS tool suite) Expertise in PD tool expertise (SNPS based - both construction & sign-off) Expertise in Cadence tools especially Innovus / Voltus Expertise in Python, Tcl , Shell programming skills Expertise in sign-off reports, triaging and root-cause analysis and suggest flow fixes Expertise in constraints / timing - STA. Expertise in full chip synthesis flow Expertise in PowerBI Expert level proficiency (Oral + Written) in Chinese language is mandatory incase Beijing, Taiwan and Vietnam are the preferred work locations Preferred resources with valid regional work permit Location - Bangalore, Beijing, Moscow, Taiwan, Vietnam
Posted 14 hours ago
3.0 - 7.0 years
0 Lacs
hyderabad, telangana
On-site
As a Silicon Design Engineer 2 at AMD, you play a crucial role in shaping the next generation of AMD products, including CPUs, GPUs, and adaptive compute engines. Your responsibilities include interfacing with large, globally distributed design teams to support complex and collaborative development efforts. You will drive automation of Synthesis, Place and Route, Logic Eqv, and Functional ECO methodologies targeting advanced technology nodes. Additionally, you will be responsible for developing and automating Synthesize, PnR, and Functional ECO for various designs at advanced technology nodes and scripting out utilities to automate different components of the implementation flow. Your role will involve collaborating closely with EDA vendors to identify innovative solutions, resolve tool/methodology issues, and enhance flow capabilities. You will contribute to the evolution of AMD's design infrastructure by improving automation, performance, and methodology robustness. Hands-on experience in Front-End Synthesis, Logical Eqv, and Conformal ECO flows is essential, along with proficiency in industry-standard tools such as DC, Fusion Compiler, FM, VCLP, ICC2, Innovus, and Conformal. Experience in PnR, STA, Formal Verification, or RTL coding domains is a plus. An automation mindset and expertise in CAD flow and methodology development on advanced process nodes are preferred. To qualify for this role, you should hold a Master's degree in Electronics Engineering and possess 3-6 years of experience in CAD flow and methodology development on advanced nodes. Proficiency in scripting languages like Python, Tcl, Perl, sed/awk is required. Strong problem-solving skills, analytical thinking, and excellent communication skills are essential. As a team player with a good work ethic, you will thrive in a collaborative environment. This position is based in Hyderabad. If you are looking to be part of a team that pushes the limits of innovation to solve the world's most important challenges, AMD could be the perfect place for you to advance your career in silicon design engineering.,
Posted 1 month ago
6.0 - 8.0 years
30 - 40 Lacs
Hyderabad
Work from Office
Experience Between 6 to 8 years Hands on with any of the spice simulators (Hspice/ Spectre) History of Leading Client Projects Qualification BE/BTech from any reputed University Masters Preferred Job Description Must have experience in leading client projects Must be good at Honouring Committed Schedules, Quality Delivery, Clarity in Communication Must have full command over major blocks of Serdes like Tx or Rx Must be good at understanding the CAD flow environment of Clients Must be able to guide Layout team to fix the simulation related issues Must be able to work with PD team to integrate the AMS blocks Must have good understanding about the importance of PPA goals and must have ideas to achieve them Debug functional and performance simulations Must be able to understand all QA check process of the client Must have command over generation of all relevant design views using sign-off tools
Posted 1 month ago
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