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1.0 - 5.0 years
0 Lacs
hyderabad, telangana
On-site
In this role, you will be leading all block/chip level physical design activities. This includes tasks such as generating floor plans, abstract views, RC extraction, PNR, STA, EM, IR DROP, DRCs, and schematic to layout verification. Collaboration with the design team to address design challenges will be a key aspect of this position. You will also be assisting team members in debugging tool/design related issues and constantly seeking opportunities to enhance the RTL2GDS flow to improve power, performance, and area (PPA). Troubleshooting various design issues and applying proactive interventions will be part of your responsibilities. Your main responsibility will be overseeing all aspects of physical design and implementation of GPUs and other ASICs targeted at the desktop, laptop, workstation, and mobile markets. Minimum Qualifications: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with at least 3 years of Hardware Engineering or related work experience. - Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with at least 2 years of Hardware Engineering or related work experience. - PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with at least 1 year of Hardware Engineering or related work experience. What We Need To See: - Strong experience in Physical Design. - Proficiency in RTL2GDSII flow or design implementation in leading process technologies. - Good understanding of concepts related to synthesis, place & route, CTS, timing convergence, and layout closure. - Expertise in high frequency design methodologies. - Knowledge and experience in Block-level and Full-chip Floor-planning and Physical verification. - Working experience with tools like ICC2/Innovus, Primetime/Tempus, etc., used in the RTL2GDSII implementation. - Strong knowledge and experience in standard place and route flows ICC2/Synopsys and Innovus/Cadence flows preferred. - Familiarity with timing constraints, STA, and timing closure. - Proficiency in automation skills in PERL, TCL, tool-specific scripting on industry-leading Place & Route tools. - Ability to multitask and work in a global environment with flexibility. - Strong communication skills, motivation, analytical & problem-solving skills. - Proficiency in using Perl, Tcl, Make scripting is preferred. As you consider your future career growth, we invite you to explore the opportunities our organization can offer you.,
Posted 1 day ago
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