628 Axi Jobs - Page 8

Develop/Maintain tests for functional verification and performance verification at the core level Build testbench components to support the next generation IP Maintain or improve current test libraries to support IP level testing Create hardware emulation build to verify the IP functional performance Maintain and improve current hardware emulation environment to speed up the runtime performance and improve the debug facility Provide technical support to other teams PREFERRED EXPERIENCE: Good at C/C++ Familiarity with SystemVerilog and modern verification libraries like UVM Experience/Background on Computing/Graphics is a benefit Experience with OpenGL/OpenCL/D3D programming is a benefit

We are looking for skilled Senior ASIC/SoC RTL Engineer / Lead / Managers with 5-20 years of experience to join our team in Bangalore, Chennai, Hyderabad, Kochi, Pune, Noida, and Ahmedabad. The ideal candidate will have expertise in SoC/IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog, AMBA bus protocols (AXI, AHB, ATB, APB), interface protocols, and scripting languages like Make flow, Perl, shell, and Python. Roles and Responsibility Design and develop high-quality ASIC/SoC RTL code. Lead the development team in integrating subsystems and clusters at the SoC level. Collaborate with cross-functional teams to ensure successful project execution. Develop and ...

**Role Overview:** At EdgeCortix, a deep-tech startup revolutionizing edge computing with artificial intelligence and novel high efficiency silicon on chip design, your role as a member of the Artificial Intelligence Hardware Team involves owning the IP integration into ASSP/SOC, integrating EdgeCortix DNA IP and other third-party IP, and contributing to the development of verification infrastructure. You will play a crucial role in enhancing the energy efficiency for AI inference at the edge, aiming for cloud-level performance on small to medium form factor devices. **Key Responsibilities:** - Own the IP integration into ASSP/SOC - Integrate EdgeCortix DNA IP and other third-party IP - Expe...

Tech Lead : 8 to 15 Years Job Locations : Bangalore/Hyderabad/Ahmedabad/Chennai (WORK FROM OFFICE ONLY) (NO WORK FROM HOME OR REMOTE WORK) What We Offer : A Fortune 109 Employer Brand Best In Class Employee Welfare Practices Cutting Edge, Full Chip ODC Projects Higher Education Sponsorship in Top Notch Institutes Good Salary & Perks Job Description: Must have expertise in ASIC verification methodologies and ASIC design flow Experience working of SV and UVM methodology and knowledge of at least one industry standard protocols like Ethernet, PCIe, MIPI, USB, AXI, RISC-V, AMBA, DDR or similar is required, must have executed at-least 2 SoC Verification projects Experience in any of the listed to...

This Position reports to: TCMS Project Technical Lead Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. The work model for the role is: Onsite/HybridThis role is contributing to the Motion Business Traction division in Bengaluru. Main stakeholders are railway/rolling stock integrators. You will be mainly accountable for: TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle devel...

This Position reports to: TCMS Project Technical Lead Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. The work model for the role is: Onsite/HybridThis role is contributing to the Motion Business Traction division in Bengaluru. Main stakeholders are railway/rolling stock integrators. You will be mainly accountable for: Lead TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle ...

We are looking for a skilled Azure Terraform professional with 6-9 years of experience to join our team. The ideal candidate will have expertise in Azure administration, Scale Sets, VM administration, Windows fileserver, Load Balancers, SQL server RDS, Azure Managed Disk, Basic networking, and .NET. Roles and Responsibility Configure and manage Azure infrastructure, including scale sets, virtual machines, and storage. Design and implement load balancing solutions using Azure Load Balancer. Manage and maintain SQL server RDS replication on DR sites. Configure database connections and perform performance tuning. Troubleshoot connectivity issues by opening ports, configuring firewalls, NSGs, an...

We are looking for a skilled professional with 7 to 15 years of experience in Design Verification to join our team. The ideal candidate will have expertise in SV/UVM Test Bench Development and protocols such as PCI Express, UCIe, CXL, AXI, ACE, CHI, Ethernet, RoCE, RDMA, DDR, LPDDR, or HBM. Roles and Responsibility Develop and implement test benches using SV/UVM methodology. Collaborate with cross-functional teams to identify and prioritize verification requirements. Create and execute test cases to ensure design quality and reliability. Analyze and debug issues found during testing. Participate in the development of verification plans and strategies. Work closely with designers to resolve d...

We are looking for a skilled Design Verification Engineer with 6 to 11 years of experience. The ideal candidate will have expertise in System Verilog and UVM, PCIe, Ethernet, and solid Linux environment skills. This position is available in Bangalore, Hyderabad, and Ahmedabad. Roles and Responsibility Develop and implement verification environments using System Verilog and UVM. Verify IP, SOC, and pre-silicon designs. Collaborate with cross-functional teams to identify and resolve design issues. Create and maintain testbenches and testcases for verifying complex digital circuits. Analyze and debug verification results to ensure design quality. Participate in the development of new verificati...

Design Verification Engineer - Specialised in Protocol like;n PCIe/Ethernet/DDR/LPDDR/HBM Location: Bangalore, India Experience: 5-12 Years Job Description Experience in interconnect protocol PCIe/ Ethernet. Experience in Memory protocol DDR/LPDDR/HBM; HBM is preferred. AXI/ACE/CHI understanding, [AXI is must] Understanding of DMA usage. Strong in SV/UVM. Experience in the usage of standard VIP in TBs (preferably Synopsys) AI/ML network understanding (good to have). Additional knowledge of perl/tcl scripting will be an advantage. Must Bachelors Degree in Electrical, Electronics or Computer Engineering

Are you looking for a unique opportunity to be a part of something great Want to join a 20,000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust, empowerment, respect, diversity, and communication How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nation...

As a member of the Front End CAD team, you will be responsible for the development, standardization and maintenance of engineering flows that enable system verification activities within the Solutions Engineering team, working with engineers from our project teams to help them deploy best-practise across a common set of requirements. The flows you will help to develop will include areas such as simulation, emulation and formal verification and advancements in machine-readable specifications to aid automation of standard methodology within SE, enabling our verification community to achieve the best possible results. You will collect and analyse verification metrics and work with tools from mu...

As a member of the Front End CAD team, you will work on the development, standardization and maintenance of our internal engineering flows that enable system verification activities within the Solutions Engineering team, working with engineers from our project teams to help them deploy best-practise across a common set of requirements. The flows you will help to develop will include areas such as simulation, emulation and formal verification and advancements in machine-readable specifications to aid automation of standard methodology within SE, enabling our verification community to achieve the best possible results. You will collect and analyse verification metrics and work with tools from ...

Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. You will be mainly accountable for: TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle development models. Translate functional descriptions into Software Requirement Specifications (SRS) and logical/mathematical models. Conduct internal and external design reviews, ensuring alignment with project goals and stakeholder expectat...

Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. You will be mainly accountable for: Lead TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle development models. Translate functional descriptions into Software Requirement Specifications (SRS) and logical/mathematical models. Conduct internal and external design reviews, ensuring alignment with project goals and stakeholder exp...

As a Senior SoC Verification Engineer at Modernize Chip Solutions, you will be an integral part of our cutting-edge design team, contributing to next-gen semiconductor solutions. Your passion for verifying complex SoCs will drive innovation and impact in our projects. Key Responsibilities: - Work on block-level and SoC-level functional verification using advanced methodologies such as UVM/SystemVerilog. - Develop testbenches, test cases, and regression suites to ensure high design quality. - Perform coverage analysis, debug, and issue resolution across subsystems like PCIe, USB, Ethernet, DDR, or AMBA protocols (AXI/APB/AHB). - Collaborate closely with design, validation, and architecture te...

Minimum qualifications: Bachelor's degree in Mechanical Engineering, Electrical Engineering, Industrial Engineering or equivalent practical experience 3 years of experience with standard GPU workloads like Manhattan/3DMark Experience with GPU architecture and AMBA Bus protocols like AHB/AXI/ACE Preferred qualifications: Master's degree or PhD in Electrical Engineering or Computer Science, or a related field Experience with performance verification of ASICs and Application-Specific Integrated Circuit (ASIC) components Experience with verification of low power techniques About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's...

About The Role Your Role As a SoC GLS Verification Engineer , you will play a key role in verifying complex SoC designs through Gate-Level Simulation (GLS). You will work closely with design and verification teams to ensure functional correctness, timing accuracy, and overall quality of silicon-ready designs. Your expertise in GLS methodologies and debugging will be critical in delivering high-performance, reliable SoCs. In this role, you will: Perform GLS using Zero Delay , SDF , and Post-Layout GLS (PAGLS) techniques. Debug and resolve issues in gate-level simulations to ensure timing and functional correctness. Develop and maintain SystemVerilog/UVM testbenches for GLS environments. Colla...

4+ years of experience in System Verilog & UVM. Expertise in any one of the industry standard protocol like PCIe, Ethernet, DDR, USB, UCIe, AXI etc.

SoC Design Engineer Job Title: SoC Design Engineer Experience: 2 - 5 years Education: M.Tech or B.Tech in EE/ECE Responsibilities: SoC-level integration of IPs, interconnects, memory subsystems Define SoC microarchitecture and collaborate with system architects Address performance, power, and area trade-offs Collaborate with verification, software, and physical design teams Requirements: Experience in SoC architecture, AXI/AHB/NoC protocols Hands-on with multi-clock, low-power design Familiarity with UPF, CDC, and RDC checks

VeriFast Technologies is hiring Sr Verification Engineers in Pune with minimum 3+ to 5+ years of experience with PCIe/PCI-E, UCIe, CXL, strong SV, UVM, hands on AXI with ASIC/SoC. Do call me at 9934158404 or drop your CV to [HIDDEN TEXT]. Let's chat about it.

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-8 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC ver...

Long Description 1. ASIC RTL Engineer : RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One scripting languages like Make flow, Perl ,shell, python - Any One LocationBangalore / Hyderabad / Kochi Experience - 7+ - Lead/Architect 2. Emulation Lead JD - Emulation Lead (Zebu/ HAPS /Veloce/Palladium and Module Build (End to End) Location - Bangalore / Hyderabad Experience - 7+ - Lead/Architect 3. Lead Design Verification Engineer : 7+ years of hands-on DV experience in SystemVerilog/UVM. Must be able to own and drive the verification of a block / s...

Key Responsibilities: Develop, integrate, and validate RTL designs for complex ASIC/SoC projects. Perform lint checks, CDC analysis, and RDC verification using industry-standard tools (Spyglass, Meridian, etc.). Collaborate with design verification teams to ensure functional correctness and quality sign-off. Drive synthesis-friendly RTL coding practices and participate in design reviews. Debug and resolve issues across RTL, lint, CDC, and timing. Work closely with architecture and verification teams for spec-to-RTL implementation . Required Skills & Expertise: 5+ years of experience in ASIC RTL design & verification . Strong hands-on expertise in Lint, CDC, and Meridian tools. Proficiency in...

Role Overview: As a SoC RTL Design Engineer at Lattice Semiconductor, you will be part of the HW design team focusing on IP design and full chip integration. This role, based in Pune, India, will involve working on RTL design, full chip integration, and projects within similar time zones. Key Responsibilities: - Work on RTL design using best-in-class coding styles, algorithms, and utilizing Verilog and System Verilog. - Conduct SoC integration and quality checks such as lint, CDC, RDC, SDC, etc. - Collaborate closely with the architect and micro-architect team to define design specifications and accelerate design time. Qualifications Required: - BS/MS/PhD in Electronics Engineering, Electric...