628 Axi Jobs - Page 6

As an ASIC Design Engineer at our company, your role will involve defining micro architecture from datasheet or requirements document, performing RTL-level design for digital logic, conducting module-level verification and lint checking, as well as collaborating with verification engineers for test plan review and coverage debug. Key Responsibilities: - Define micro architecture based on datasheet or requirements document - Perform RTL-level design for digital logic - Conduct module-level verification and lint checking - Collaborate with verification engineers for test plan review and coverage debug Qualifications Required: - B.Tech/M.Tech in Electronics/VLSI Engineering - 3-5 years of exper...

Role Overview: As a DV Lead Engineer at TekWissen in Mysore, your responsibilities will include: Key Responsibilities: - Build test plan, tests, coverage assertions from Specification. - Architect and build testbench and testbench components with expertise in UVM, SV, and C SVA. - Demonstrate familiarity with industry protocols like AXI, APB, AHB, PCIe, SoC. - Showcase strong debugging skills and experience with industry standard EDA tools such as Synopsys, Cadence simulators, and debugging tools. Qualifications Required: - Experience with scripting and automation. - Demonstrated leadership and collaboration abilities, including mentoring, cross-functional communication, UPF-simulations, GLS...

Role: RTL Engineer Employment Type: Full Time Educational Qualification: Bachelor's degree in Electrical Engineering, Computer Science, or a related field. Work Experience: 24 years of industry experience. Role Description Pixxel is widely considered to be one of the fastest-growing aerospace start-ups. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of earth observation. Come join our Avionics team and help us build future architectures that will continue to drive us forward in the field. Responsibilities & Duties Participate in next-generation system architect...

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globa...

Job Description: Own RTL design of SoC-level or large subsystems from specification to silicon bring-up. Define and implement micro-architecture; write high-quality, synthesizable RTL in SystemVerilog/Verilog. Work closely with physical design teams for synthesis, timing closure, power, area optimization, DFT hooks, and ECOs. Drive block/subsystem integration and ensure seamless bring-up. Collaborate with verification teams to define test plans, assertions (SVA), and coverage goals. Support silicon validation, post-silicon debug, and drive closure of design bugs. Apply low-power design techniques (UPF/retention/isolation) and clock/reset design best practices. Work on standard bus protocols ...

Job Description: Were looking for a talented GLS (Gate-Level Simulation) Verification Engineer with strong experience in verifying complex SoCs using industry-standard tools and methodologies. Key Responsibilities & Skills: * Hands-on experience in GLS verification using Cadence Xcelium (mandatory) and Synopsys VCS. * Minimum 3 years of GLS experience with a solid understanding of gate-level verification flows. * Good understanding of physical design concepts relevant to GLS verification. * Strong knowledge of SystemVerilog and UVM-based testbench environments. * Experience with DDR or HBM PHY GLS will be an added advantage. * Basic understanding of SoC design and common bus protocols (AMBA,...

Job Description: Were looking for passionate Design Verification Engineers experienced in ASIC/SoC environments to contribute to high-performance PCIe, Networking, and IP Sub-System verification using industry-leading tools and methodologies. Key Responsibilities & Skills: Develop UVM-based testbenches and verification infrastructure for complex SoC and IP subsystems. Define and execute verification plans, coverage metrics, assertions, and regression strategies. Work on block-level and subsystem-level verification, ensuring reusable and scalable verification components. Collaborate with design, validation, and integration teams to ensure end-to-end functional quality. Strong knowledge of Sys...

Hi All, ACL Digital is hiring #Senior #Design #Verification Engineer! Experience: 4 Years Location: Bangalore / Hyderabad Notice Period: Immediate to 30 Days Preferred! We're seeking experienced professionals ASIC/SoC verification. If you have expertise in UVM/System Verilog, proficiency in scripting languages like Python/Perl/TCL, and a strong grasp of protocols such as AXI, APB, PCIe, and DDR. Thanks, K Himabindu

Job Title: Design Verification Engineer Exp Level:4+yrs Location: Bangalore/Hyderabad Job Description: Responsible for ensuring functional correctness of ASIC/SoC designs. Key Task: Develop and execute verification plans for complex digital designs. Methodology: Use UVM/SystemVerilog to create testbenches, write test cases, and debug failures. Coverage: Achieve functional and code coverage targets through constrained random and directed testing. Collaboration: Work with RTL designers to identify and resolve design bugs. Tools: Leverage industry-standard tools (VCS, Questa, Verdi) for simulation and debug. Protocols: Verify IP/SoC-level designs for common protocols (AXI, APB, PCIe, DDR, etc.)...

Over 10 years of digital IP verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flow Proficient with Verilog, System Verilog and UVM. Good in UVM concepts and SystemVerilog language. (SVA, UVM scoreboard) Good in defining and developing UVM based verification frameworks, testbenches, processes and flows. Good in working in Linux and Windows environments. Familiarity with power aware simulation and firmware/hardware co-verification is a plus. Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus. Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.

As an AOI, AXI & SPI Machine Systems Optimization Engineer, your role involves optimizing AOI, AXI, and SPI machines to ensure accurate defect detection and minimum false calls. Your key responsibilities include: - Collaborating with customers to understand their specific requirements and tailor solutions accordingly - Analyzing and optimizing machine settings and inspection algorithms for accurate defect detection - Conducting thorough testing and validation of systems to ensure they meet performance expectations - Staying updated with the latest advancements in AOI, AXI & SPI technology and industry trends In addition, you will also be responsible for: - Serving as a technical point of con...

Job Specs : - Expertise in Digital Verification - Expertise in Functional Verification - Expertise in SOC / IP Verification - Expertise in working on system Verilog assertions & test benches - Expertise in working on OVM / UVM / VMM based verification flow - Expertise in working on ARM processor - Expertise in working on AMBA bus protocols (AXI, AHB, APB) - Expertise in CXL or PCIe Protocol Verification - Expertise in simulation tools (VCS, ModelSim, Questa) - Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. - Expertise in analysing Code Coverage, Functional Coverage and Assertions. - Expertise in verification of complex SoCs. - Expertise in T...

Job Specs : - Expertise in Digital Verification - Expertise in Functional Verification - Expertise in SOC / IP Verification - Expertise in working on system Verilog assertions & test benches - Expertise in working on OVM / UVM / VMM based verification flow - Expertise in working on ARM processor - Expertise in working on AMBA bus protocols (AXI, AHB, APB) - Expertise in CXL or PCIe Protocol Verification - Expertise in simulation tools (VCS, ModelSim, Questa) - Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. - Expertise in analysing Code Coverage, Functional Coverage and Assertions. - Expertise in verification of complex SoCs. - Expertise in T...

Job Specs : - Expertise in Digital Verification - Expertise in Functional Verification - Expertise in SOC / IP Verification - Expertise in working on system Verilog assertions & test benches - Expertise in working on OVM / UVM / VMM based verification flow - Expertise in working on ARM processor - Expertise in working on AMBA bus protocols (AXI, AHB, APB) - Expertise in CXL or PCIe Protocol Verification - Expertise in simulation tools (VCS, ModelSim, Questa) - Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. - Expertise in analysing Code Coverage, Functional Coverage and Assertions. - Expertise in verification of complex SoCs. - Expertise in T...

Job Title: Design Verification Lead Location: Bangalore/Hyderabad Experience: 7+yrs Job Type: Full-time Industry: Semiconductors / VLSI / EDA Education: B.E./B.Tech or M.E./M.Tech in ECE/EEE or related field Job Description: We are looking for a passionate and experienced Design Verification Lead to drive the verification of complex SoC/IP designs. The ideal candidate will have deep expertise in functional verification methodologies and will be responsible for managing a team, defining verification strategies, and ensuring high-quality silicon delivery. Key Responsibilities: Own and lead verification activities for IP or SoC-level designs. Define and execute the verification plan, test strat...

Senior Design Verification Engineer Job Description: SV / UVM Test bench development and test cases coding. Code and Functional coverage analysis and closure. Work with team for verification closure. Experience with python or any other scripting language is a plus. Bus protocols AXI / APB / UART/ IJTAG protocol working knowledge is an advantage. Experience : 3 to 8 Years. Location : Bangalore.

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SOC Architect - PCIe/CXL/UAL/DMA The Role AMD-Xilinx is looking for a SMTS SoC Archite...

Advantal Technologies is looking for FPGA Engineer to join our dynamic team and embark on a rewarding career journey An FPGA (Field-Programmable Gate Array) Engineer is responsible for designing, developing, and implementing digital circuits and systems using FPGA technology They work on projects that require complex digital logic, high-speed data processing, and real-time hardware acceleration FPGA Engineers play a crucial role in various industries, including telecommunications, aerospace, defense, automotive, and consumer electronics Key Responsibilities:FPGA Design and Development: Design and develop FPGA-based solutions to meet specific project requirements This involves creating high-l...

In this role you will work on SoC/Sub-system level Emulation model development and design bring up on Zebu/Veloce HW platforms. Additionally, you will work closely with design, verification, validation, and SW teams to implement emulation testbench (XTORs, Speed Adaptors) and features required to develop content on emulation models. You would develop tests to qualify models. Key Skills 8-15 years of experience on SoC/Sub-system Emulation of multi-million gate and complex design with multiple clocks and power domains Experience in microcontroller architecture, Cores ARM A/M series, Interconnect (NIC, FlexNoC), Protocols like AHB, AXI, Memory (Flash, SRAM, DDR4/5), and memory controllers Exper...

As an RTL Engineer and Lead at Tessolve Semiconductors in Bangalore or Hyderabad, your role will involve RTL ASIC front end design with microarchitecture and Verilog coding. Your key responsibilities will include: - MAS development - RTL coding - Development of module and feature addition - Experience in medium complexity protocols - Familiarity with slow speed protocols like I2C, SPI, and UART - Knowledge of AMBA bus protocols (APB, AHB, AXI) - Experience in quality check flows such as linting and CDC For candidates with 8+ years of experience, the expectations will be higher, including: - Very strong RTL coding skills - Micro-architecture (uArch) development - Ownership and delivery of a s...

You will be joining 7Rays Semiconductors, a company that specializes in providing end-to-end VLSI design solutions to help clients achieve execution excellence. The team of experts at 7Rays Semiconductors is proficient in various areas such as architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using the latest technologies and methodologies. The company is dedicated to building effective partnerships with clients to deliver high-quality solutions tailored to their specific needs. With a proven track record of successful projects, 7Rays Semiconductors is committed to excellence and innovation in semiconductor design. **Key Responsi...

Senior Design Verification Engineer Looking for Verification engineer who is going to work on testbench development, test cases / assertions / functional coverage coding, debugging. Should be an enthusiastic and a quick learner of the verification flow. Job Description: SV / UVM Test bench development and test cases coding Code and Functional coverage analysis and closure Work with team for verification closure Experience with python or any other scripting language is a plus Bus protocols AXI / APB / UART/ IJTAG protocol working knowledge is an advantage. Experience: 4 to 6 Years Location: Hyderabad

Lead a team of 5-10 resources Understand the design specification , PowerOn Specification Understand boot firmware and reset flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Bachelor's Degree Required technical and professional expertise 8+ years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification Chip reset sequence and in...

Would require to lead a V&V team in software validation as per aero & defence standards. Also, to lead the team for hardware and sub-system/system level testing.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences - from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges -striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond....