8 Ate Jobs

Role & responsibilities 3-5 years of LabVIEW development experience Aerospace ATE experience (recommended) Development of test software in LabVIEW, TestStand and Veristand (atleast 2 required) Atleast 2 projects executed as developer

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: DFT ATPG Engineer Location: Bangalore Work Type: Onsite Job Type: Full time Job Description: Minimum 4+ years of experience in ATPG and GLS • Good understanding of ATPG and DRC Analysis in ATPG • Handson in debugging low coverage • Handson in Simulation in no timing and timing with good debugging skills • Exposure to Silicon debug on ATE is an addon TekWissen Group is an equal opportunity employer supporting workforce diversity.

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: Senior/lead DFT Engineer (MBIST) Location: Bangalore Work Type: Onsite Job Type: Full time Job Description: Minimum 8+ years of experience in Mbist Architecture, Insertion and Verification • Good understanding of Mentor Mbist Solution • Deliver Mbist patterns for ATE test • Support Mbist pattern failure on ATE TekWissen Group is an equal opportunity employer supporting workforce diversity.

Principal DFT Engineer Bangalore (Hybrid ) / Hyderabad (Hybrid ) Principal DFT Engineer Full Time \ Experienced Summary Join an ambitious, experienced team of silicon and distributed systems experts as a Design For Test engineer. You have the opportunity to build a groundbreaking new category of product that revolutionizes the performance and scalability of next-generation distributed computing systems, and to help solve key infrastructure challenges facing our customers. We are looking for talented, motivated candidates with experience building and deploying DFT flows for large-scale networking and computing chips, and who are looking to grow in a fast paced, dynamic startup environment. Roles & Responsibilities As a member of our team, you will work with multi-functional teams, implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan compression. You will work with 3rd party IP vendors to integrate Memory BIST, scan, PHY I/O BIST, and other DFT logic into a streaming scan fabric with a sequential scan compressor/decompressor You will work with DFT Solutions Vendors to port those patterns at the top-level, to implement Memory BIST interface in high performance processor IP, and to implement high-speed I/O for the logic scan test You will work with Physical Designers to validate the DFT timing constraints You will work with RTL Designers to verify test design rules You will work with Test Engineers to bring up the patterns on the ATE Automated Test Equipment You will help develop and deploy DFT methodologies for our next generation products. Key Qualifications MSEE or equivalent experience 8-13+ years of experience in DFT or related domains You will have a solid knowledge and expertise in defining scan test plans, BIST including memories and IOs, fault modeling, ATPG and fault simulation Possess excellent analytical skills in verification and validation of test patterns and logic on complex and multi-million gate designs using vendor tools Have good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade-offs Experience in Silicon debug and bring-up on the ATE with an understanding of pattern formats, failure processing, and test program development Strong programming and scripting skills in Perl, Python or Tcl desired Exceptional written and oral and interpersonal skills with the curiosity to work on rare challenges Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

Role & responsibilities We are looking 3 years of Exp in PCB Design (ATE Preferred) Knowledge about PCB Footprint creation Experience in DFM & DFA Analyses using CAM 350 Preferred candidate profile Diploma or any UG Degree. Both Male & Female can apply. Other Benefits PF & Medical Insurance Food Subsidy Interested share resume to vidya.ranganathan@pactroninc.in Mobile No: 9655603308

Hi, Warm Greetings! We are looking for Senior Manager - Software Engineer (with good in LabView & Teststand) and strong in Electrical or Electronics components, ATE, NI LabView, C embedded,etc ,. This Opportunity for a reputed MNC Organization based at Bangalore Location. Currently only looking for Female candidates. Description - External Seeking a suitable LabVIEW /TestStand software experience Engineer to join our SPD Bangalore Operations. Reporting to the Project Leader/GM Manager, the role demands for focusing on Single phase and three phase ATE's and PCBA BON design, Unit level test automation development for new products. Candidate should be able to bring, develop & communicate a strong knowledge of test applications and to be seen as an expert in this field by this Organization's customers & internally. Co-engineer, develop and implement the best test solutions for target customers, incorporating the Organization standards and Test policies. Improving the test coverages, work with relevant departments for analysis and come up with effective solutions, validate & prepare evaluation reports to release the test tools / equipments. Convert application knowledge & experience into added value for the business through writing application guides, bulletins, white papers, best practices and through the training of customers and internal Organization staff. Provide the technical support to enable Test Engineers to support for the manufacturing issues. Skills and Knowledge required: ATE Hardware Design and test automation coding design using Lab View /TestStand with suitable architecture. The Same thing should be validated in bench setup as well as ATE. Good knowledge in debugging, Failure Analysis, yield calculation and customer report generation. Primary responsibility of the role includes (but is not limited to): Understand the test spec and Development LabView and TestStand Application in Windows environment. Understanding the High-power Product functionality and derive Functional test spec for test ability and review, selection of suitable Instruments for ATE design, Knowledge in Electric and electronic component selection, basic wiring & Soldering, PCBA and Unit level test automation (Hipot, Functional and Load testing) Test Firmware / product firmware loading Engineering. Documentation: Understanding Functional Test spec, ATE / BON Bill of Material, Engineering Change Orders/Proposals, Test Plan, Test Procedures, Work Instruction and Electrical drawings review /creations. Database: Perforce, PDM, Jira and iTAC and MES Key Elements of the role: All types of PCBAs Functional BONs and single phase and three phases ATE development and idea on Measuring Instruments, Calibration and controls. Hands on experience in power instruments, programmable power supply using GPIB, RS232, RS485 and CAN Communication protocols. C, C++/ Python programming is knowledge added advantage. Experience and Requirements for the Role: 8-12 years of Experience in ATE/ BON, LabVIEW/ TestStand development for new product test automation and hands-on experience on Ni tools, ATE Bill of Material (BOM) and Engineering Change Orders (ECO) / Proposals, special equipment study and procurement. Design test bench setup using Three phase High voltage programmable equipments and handing with safety measures. Able to Test individual or stack PCBA group, unit sub-assembly and main unit level using bench test setup with power sources and multiple measuring instruments. Qualifications - External B.E/B.Tech/ M.Tech in ECE/EEE, Ni CLD / PMP trained or certified is preferable. Technical and commercial Tools: Hands on experience Ni LabVIEW, TestStand, C embedded And Perforce/SVN , ECAD, Oracle , PMP, PEP & Agile methodology. Communication: Good communication in English (read, write and speak) If you are interested, please share your cv to gowsalya@bvrpc.com Thanks & Regards, Gowsalya

Position Hardware Design Engineer ATE Capabilities and Responsibilities: System Architecture and Schematic diagrams creation. Wiring Diagrams Generation as per COTs Equipment and customized Hardware interface requirement. • Protocol Simulation Hardware development. Electronics Equipment Specifications, Design, Acceptance and Qualification test procedures generation. Product Data Package. Cross Functional Team interaction (Project, Product Developer, Quality and Manufacturing) PCI/PXI/PCIe and Analog Hardware Design & Development. Skills, Experience and Knowledge: Hands on experience of Design & Development of PCI/PXI Instruments based ATEs for avionics and defense products. Competent in Hardware design, COTs Equipment finalization, Interface Circuits Schematics & Wiring Diagrams generations and Serial Interface protocols like RS422, ARINC429 & MIL-1553B. An excellent team player with good communications, problem solving and influencing skills acquired in a technical community. Key Attributes: -Energetic, - Self-driven/ initiator, -Relationship oriented, -English Communication Skills (Written & verbal), -Strong analytical & Engineering knowledge, -Effective Planner -Team Builder

Role & responsibilities a. Guide / Mentor branches for ATE Business Development. b. Key Account Management. c. Manage Proposed Team for Timely submission of Technical Proposal & Commercial. d. Technically discuss with customer to finalise the scope. e. Negotiate & Finalise the deal. f. Interact with Execution and support team for fruitful completion of the project on time. g. Should have experience in ATE Business Development / Instrument Sales in EMS / EV Market. Preferred candidate profile BE/B.Tech graduates having 10+ Yrs of experience in ATE Business Development. Willing to travel Good Communication skills Should be go-getter and willing to meet customers and provide them with requisite technical solutions.