6.0 - 10.0 years

0 Lacs

vijayawada, andhra pradesh

On-site

In this role at Coventine Digital Private Limited as a Senior/Lead Design Verification Engineer in Siruseri, Chennai, you will work directly with a prominent client on next-generation chip-level verification environments utilizing System Verilog and UVM methodologies. **Key Responsibilities:** - Conduct functional verification at both block and chip levels for complex designs - Develop verification test plans based on detailed design specifications - Construct UVM-based simulation environments using System Verilog - Perform coverage analysis to ensure validation completeness - Implement assertion-based verification for functional robustness - Collaborate across teams to align design and veri...

Posted 1 month ago

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Sales Coventine Digital Private Limited

6.0 - 10.0 years

0 Lacs

vijayawada, andhra pradesh

On-site

Role Overview: You have been invited to join Coventine Digital Private Limited as a Senior/Lead Design Verification Engineer in Siruseri, Chennai. In this role, you will work directly with a prominent client, contributing to the development of next-generation chip-level verification environments utilizing System Verilog and UVM methodologies. Key Responsibilities: - Conduct functional verification at both block and chip levels for complex designs. - Develop verification test plans based on detailed design specifications. - Construct UVM-based simulation environments using System Verilog. - Perform coverage analysis to ensure validation completeness. - Implement assertion-based verification f...

Posted 3 months ago

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