ASIC Verification

As a Junior ASIC Verification Engineer at Kinara, you will be part of our dynamic team working on cutting-edge AI solutions that are revolutionizing the capabilities of individuals and businesses. Your primary responsibility will be to lead and execute verification efforts for complex ASIC designs, ensuring the quality and reliability of our products. Your key responsibilities will include developing and maintaining verification plans, testbenches, and test cases for ASIC designs. You will design and implement SystemVerilog/UVM-based verification environments, create and execute test cases to verify functionality, performance, and compliance with specifications, as well as write test plans and test cases at the unit or SOC level. To excel in this role, you should hold a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Proficiency in SystemVerilog, C, and C++ languages is essential, along with experience with verification tools such as VCS, QuestaSim, or similar. Strong problem-solving and debugging skills, excellent communication, and teamwork abilities are also necessary for success in this position. Preferred qualifications include experience with scripting languages like Python or Perl, knowledge of industry standards and protocols (e.g., AXI, AHB), and familiarity with formal verification techniques. At Kinara, we have a culture that fosters innovation, with technology experts and mentors who coach passionate professionals to tackle exciting challenges collaboratively. Join us at Kinara and be part of a team that values diverse perspectives and encourages sharing of responsibilities. We are excited to review your application and hear your unique story. Make your mark with us!,