793 Asic Verification Jobs - Page 5

About The Role Your Role As a Senior FPGA Design Engineer at NEC Mobile Network Excellence Center (NMEC), Chennai, you will be responsible for designing, implementing, and testing FPGA-based hardware systems for Datacom and Aerospace applications. You will work closely with cross-functional teams to integrate system components and demonstrate proof-of-concept designs in advanced technologies.In this role, you will: Implement FPGA code on target hardware and test with system components and software. Perform RTL design, implementation, testing, and integration of FPGA-based systems. Deliver high-performance hardware solutions for Datacom and Aerospace applications. Participate in R&D activitie...

Design Verification Engineer Onsite Bangalore, India Offshore F2F Interview * Collaborate with cross-functional teams on ASIC design and verification using Perl, TCL. * Develop UVM testbenches for PCIe, Ethernet interfaces and AXI protocols.

As an ASIC Verification Lead at Eviden, you will be responsible for integrating the ASIC functional verification team. The ASICs developed include network controllers, routers, and cache coherence controllers targeting high-end servers. You will utilize Constraint-Random and Coverage Driven functional verification methodologies under the UVM verification framework to ensure comprehensive verification of complex ASIC designs. **Key Responsibilities:** - Acquire in-depth knowledge of the architecture and microarchitecture of the ASIC by studying specifications and collaborating with architecture and logical design teams. - Participate in defining verification strategies, methodologies, and sim...

Architecting and making strategic decisions on test bench design for IP Core verification. Developing comprehensive verification plans and specifications based on functional requirements. Implementing robust test bench infrastructure and authoring advanced test cases using UVM/VMM/OVM. Driving a coverage-driven verification methodology to ensure thorough validation of IP functionality. Leading technical aspects of the verification team, mentoring junior engineers and collaborating internationally. Providing innovative verification solutions to enhance productivity, performance, and throughput. Engaging in assertion-based verification and coverage closure to guarantee high-quality deliverable...

NAB is looking for Associate Vice President to join our dynamic team and embark on a rewarding career journey Responsibilities: Develop and implement business strategies to achieve organizational goals. Lead and manage multiple departments or business units. Monitor performance metrics and ensure alignment with company objectives. Build and maintain relationships with key stakeholders and clients. Identify opportunities for business growth and expansion. Provide leadership and guidance to senior management teams. Disclaimer: This job description has been sourced from a public domain and may have been modified by Naukri.com to improve clarity for our users. We encourage job seekers to verify ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Looking for candidates between 3 to 13 years of experience. Worked on coverage driven module verification. Strong in System Verilog, UVM Sound experience in testbench (stimulus, agent, monitor, checker) development. Failure debugging with Verdi & log file. Worked in the verification having c based reference model inside the testbench Experience with assertion development. Familiar with the EDA tools IUS, VCS, Verdi etc. Exposure in scripting(perl, Python). Good team player. Need to interact with the designers and other verification engineers proactively. Prior experience with video pipeline is added advant...

At PRSsemicon Technologies and Spec2chips semiconductor a PRSgroup of companies, we are shaping the future of semiconductor innovation by building a Global Capability Development Centre. We are looking for graduates with Minimum 1yr industry experience or freshers who have got minimum 1year exposure to Live Projects through internship and passionate about VLSI domains to join our team. You will be working on developing intellectual properties and gain hands-on experience, Your Journey with Us. Hands-on Experience with industry-standard tools and methodologies , silicon proven IP’s. Expert Guidance from seasoned professionals. S V/UVM/Cadence/Synopsys/C SI/DSI/UFS/PCIe/CXL skills are must Wha...

We are looking for a highly motivated and enthusiastic Business Development Executive to join our team in Delhi. The ideal candidate should have 0 to 1 years of experience. Roles and Responsibility Develop and implement effective business strategies to achieve sales targets. Build and maintain strong relationships with clients and identify new business opportunities. Conduct market research to stay updated on industry trends and competitor activity. Collaborate with cross-functional teams to drive business growth. Identify and pursue new business leads through networking and cold calling. Negotiate contracts and agreements with clients to ensure mutually beneficial terms. Job Requirements St...

Overview Design Verification Responsibilities Build SoC, subsystem & IP Verification Environment using UVM methodology. Creating Test Plan in accordance with SoC Specification released by Client. Writing Test cases, run simulation, analysis, debug failures etc. Functional Coverage analysis. (Code/Line/FSM etc ) Requirements SV, UVM

About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test ca...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Candidates with 1-3 Yrs expertise in SV, UVM, Verilog, DV, RTL design knowledge. Preferred VLSI Diploma course mandatory. VLSI products and services

GLS -Gate-Level Simulation Engineer Number of Open Positions4 Experience: 4+ years Location Hyderabad About The Role : We are looking for a highly skilled and experienced Gate-Level Simulation Engineer to join our team. The ideal candidate should have a minimum of 4 years of experience and possess a strong background in gate-level simulation (GLS). Proficiency in SystemVerilog (SV) and Universal Verification Methodology (UVM) is essential for this role. Key Responsibilities: Collaborate with cross-functional teams to define and execute gate-level simulation test plans. Develop and implement gate-level simulation strategies for complex digital designs. Conduct gate-level simulations to verify...

DV (Design Verification Engineer) Number of Open Positions: 7 Location: Bangalore Experience: 4 to 7+ years About The Role : We are currently seeking talented and experienced Design Verification Engineers to join our team in Bangalore. As a Design Verification Engineer, you will be responsible for ensuring the functionality, performance, and reliability of our complex designs, with a focus on Core Data Path (CDP), Graphics Data Path (GDP), USB4 (USB 4.0), Power Gating (PG), and Power Management (PM) domains. We are looking for candidates with 4 to 7+ years of relevant experience in design verification. Key Responsibilities: Verification Planning: Collaborate with design and architecture team...

RTL & Synthesis combined skills Qualifications: Bachelor’s or Master’s degree in Electrical Engineering or related field (BE/BTech/M.E/M.Tech) Excellent communication skills, both verbal and written Experience: 5-8 years of experience in RTL Design with exposure to synthesis OR 8+ years of experience in RTL Design Strong understanding of digital basics Proficiency in RTL coding (Verilog), IP design, and RTL integration Hands-on experience with LINT, CDC, and RDC Experience in writing UPFs and CLP/VCLP checks Familiarity with synthesis flow and validating design constraints Specific domain knowledge in ARM protocols, PCIe, Ethernet, RISC V, DDR, etc. Strong scripting knowledge Responsibilitie...

Senior Design Verification Engineer Experience Level: Over 4 years Location: Bangalore Skills: Proficiency in SystemC, C++, and SV/Verilog, coupled with hands-on coding experience in these languages. Strong aptitude for debugging and effective communication. Familiarity with scripting languages (desirable). Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

Design Verification Lead Experience Level: 8+ years Location: Bangalore/Hyderabad Skills: Profound expertise in MACSec and Ethernet technologies. MACSec (Media Access Control Security): Proficient in point-to-point security implementation on Ethernet links, adhering to the IEEE 802.1AE-2018 standard. IPsec (Internet Protocol Security): Skilled in establishing security between two devices across an Internet Protocol network. Hands-On Knowledge: Proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM), with practical experience in their application. Testbench Development: Demonstrated experience in developing comprehensive Test Benches (TB) and individual verification comp...

DFx 1-3 years of experience in RTL DFT Verification (DFx). Good Understanding of JTAG IEEE-1149.1 and IJTAG IEEE P1687 standard. Understanding of using ICL and PDL files for verification and knows to create a testbench. Experience in JTAG RTL verification within any UVM. Able to debug simulation fails effectively utilizing debug tools like Synopsis Verdi. Basics of system Verilog, Basics of UVM, and preferably System Verilog assertions Scripting knowledge of TCL/Perl. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

DDR5/SerDes Verification Engineer We are seeking a skilled and motivated DDR5/SerDes Verification Engineer to join our organization. As a DDR5/SerDes Verification Engineer, you will be responsible for verifying and validating the functionality and performance of DDR5 memory subsystems and high-speed SerDes interfaces. In addition to strong DDR5 and SerDes verification expertise, knowledge and experience with sideband I2C and I3C protocols would be considered a plus. Candidate should have Design and implement advanced verification environments and test benches using SystemVerilog/UVM Experience4-10 Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

SENIOR VERIFICATION ENGINEER- SV UVM SENIOR VERIFICATION ENGINEER- SV UVM SmartSoC is looking for smart and enterprisingDesign Verification engineers to come to join us and get an opportunity to do some cutting-edge work and also work in a great environment where work is Always Fun and Exciting. SmartSoCs is currently working on multiple in-house turnkey projects and client site projects and many of our projects involve complete verification from spec to closure including building complete DV environments in SV-UVM. Job Responsibilities- Build SV, SV UVM, OVM based environments. Work with many different networking and other protocols Desired Skills and Experience- 3 to 10 years of experience...

VERIFICATION LEAD – IP VERIFICATION VERIFICATION LEAD – IP VERIFICATION SmartSoC is looking for a smart and enterprising leader with expert knowledge in IP Verification to come and technically lead a Team. We are looking for someone who is very strong technically and very good at multi-tasking as your role will involve leading 7 to 8 projects at one time. You will be responsible for leading and managing a team, client communication, and project execution. This role will include- Lead an internal IP Verification team, executing projects for an offshore client Be responsible for Test Planning, Environment Architecture and Project Management of Multiple Projects Guide team members in verifying ...

Principal Member Technical Staff About The Role Solid Experience in DFT Architecture. The candidate should have experience with ATPG, JTAG, BSCAN, BIST and MBIST flows. Experience on Hierarchical DFT techniques using Pattern Retargeting in Tessent flow Strong knowledge of the Tessent Shell environment and Tessent tools The desired candidate must have specific emphasis on the following tools Test Kompress / Fastscan ATPG, MBIST, Boundary scan. Hands on experience in simulating scan patterns and debugging pattern mismatches during verification process Experience in helping to debug failing scan patterns on the ATE is highly desirable. Hands on knowledge in state-of-the-art EDA tools for DFT, d...

Lead Verification Engineer-Low Power We are seeking a highly skilled and experienced Lead Verification Engineer with expertise in USB/LPDDR and a strong knowledge of Cadence VIP. The ideal candidate will have a deep understanding of low-power design and verification techniques. Responsibilities: Develop and execute comprehensive verification strategies for USB/LPDDR subsystem designs, considering low-power design requirements. Collaborate with cross-functional teams to define verification goals and ensure alignment with project objectives. Design and implement reusable, scalable, and efficient verification testbenches using SystemVerilog/UVM or C based . Leverage Cadence VIP and other verifi...

Emulation Engineer Emulation Engineer Experience3 to 5 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: should have emulation experience working on available platforms such as; Palladium, Veloce, or Zebu, as well as experience with compilation, debug, performance, and throughput tuning Experience using Verilog, VHDL design Experience with C/C++ and System Verilog, UVM verification environments Experience writing scripts using Perl, Python, Makefile Debugging experience using tools like waveform, Verdi, Simvision Strong communication skills and ability to work as a team Description You’ll support multiple emulation environments using the latest emulation t...

Design Verification Engineer – Position 2 Experience: 5 to 12 years Location: Bangalore About The Role : We are seeking a highly skilled Design Verification Engineer to join our team in Bangalore. The ideal candidate will have 5 to 12 years of experience in IP and SOC verification and possess a strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM). This role specifically requires expertise in GLS (Gate-Level Simulation). Key Responsibilities: IP and SOC Verification Conduct IP and SOC verification activities to ensure the functionality and correctness of integrated circuits. SystemVerilog (SV) and UVM Proficiency Demonstrate strong knowledge of SystemVerilog an...