664 Asic Verification Jobs - Page 5

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cas...

We are seeking a visionary Staff Engineer as part of System Validation Infra to join our team in Bengaluru, India. In this pivotal role, you will lead the technical direction of our engineering efforts, drive innovation, and mentor our talented team of engineers. As a Staff Engineer, you will be at the forefront of designing and implementing cutting-edge solutions and monitoring infra tools and systems deployment that shape the future of our products. Working on high-performance Infra software that meet business requirements and industry standards Working on the development of technical strategies and roadmaps to guide long-term engineering initiatives Collaborate with cross-functional teams...

Develop/Maintain tests for functional verification and performance verification at the core level Build testbench components to support the next generation IP Maintain or improve current test libraries to support IP level testing Create hardware emulation build to verify the IP functional performance Maintain and improve current hardware emulation environment to speed up the runtime performance and improve the debug facility Provide technical support to other teams PREFERRED EXPERIENCE: Good at C/C++ Familiarity with SystemVerilog and modern verification libraries like UVM Experience/Background on Computing/Graphics is a benefit Experience with OpenGL/OpenCL/D3D programming is a benefit

We are looking for skilled Senior ASIC/SoC RTL Engineer / Lead / Managers with 5-20 years of experience to join our team in Bangalore, Chennai, Hyderabad, Kochi, Pune, Noida, and Ahmedabad. The ideal candidate will have expertise in SoC/IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog, AMBA bus protocols (AXI, AHB, ATB, APB), interface protocols, and scripting languages like Make flow, Perl, shell, and Python. Roles and Responsibility Design and develop high-quality ASIC/SoC RTL code. Lead the development team in integrating subsystems and clusters at the SoC level. Collaborate with cross-functional teams to ensure successful project execution. Develop and ...

We are looking for a skilled professional with 05-20 years of experience to join our team as a Design Verification Engineer in Bangalore, Hyderabad, Kochi, and Pune. The ideal candidate will have a strong background in VLSI design verification. Roles and Responsibility Develop and implement functional specifications for IPs, subsystems, and SOCs. Review and revise system designs using System Verilog and UVM. Perform RTL simulations using Synopsys and Cadence simulators. Create and verify UPF models. Collaborate with cross-functional teams to ensure successful project execution. Analyze and debug complex design issues. Job Requirements Strong knowledge of System Verilog, UVM, and RTL simulati...

We are looking for a skilled ASIC RTL Engineer with 5-9 years of experience to join our team in Bengaluru, Hyderabad, Chennai, Pune, Kochi, and Ahmedabad. The ideal candidate will have expertise in IP RTL design targeted for SOC, Static checks, some basic protocols, Low power, Micro Architecture, SoC subsystem/IP design, interface protocols, and scripting languages like Make flow, Perl, shell, and Python. Roles and Responsibility Design and develop high-quality ASIC RTL code for various applications. Collaborate with cross-functional teams to ensure seamless integration of RTL designs into larger systems. Perform static checks on RTL designs to ensure compliance with industry standards and b...

We are looking for a skilled Technical Manager with 10+ years of experience to lead our Chip Design Front End team in Bangalore. The ideal candidate will have a strong background in project management, digital design, verification, and synthesis, as well as experience with EDA tools. Roles and Responsibility Manage front-end stages of semiconductor chip design projects. Lead technical teams to achieve project goals and objectives. Develop and implement project plans and schedules. Coordinate with cross-functional teams to ensure successful project execution. Identify and mitigate risks associated with chip design and development. Ensure compliance with industry standards and best practices. ...

We are looking for a skilled Azure Terraform professional with 6-9 years of experience to join our team. The ideal candidate will have expertise in Azure administration, Scale Sets, VM administration, Windows fileserver, Load Balancers, SQL server RDS, Azure Managed Disk, Basic networking, and .NET. Roles and Responsibility Configure and manage Azure infrastructure, including scale sets, virtual machines, and storage. Design and implement load balancing solutions using Azure Load Balancer. Manage and maintain SQL server RDS replication on DR sites. Configure database connections and perform performance tuning. Troubleshoot connectivity issues by opening ports, configuring firewalls, NSGs, an...

We are looking for a skilled professional with 7 to 15 years of experience in Design Verification to join our team. The ideal candidate will have expertise in SV/UVM Test Bench Development and protocols such as PCI Express, UCIe, CXL, AXI, ACE, CHI, Ethernet, RoCE, RDMA, DDR, LPDDR, or HBM. Roles and Responsibility Develop and implement test benches using SV/UVM methodology. Collaborate with cross-functional teams to identify and prioritize verification requirements. Create and execute test cases to ensure design quality and reliability. Analyze and debug issues found during testing. Participate in the development of verification plans and strategies. Work closely with designers to resolve d...

We are looking for a skilled Design Verification Engineer with 6 to 11 years of experience. The ideal candidate will have expertise in System Verilog and UVM, PCIe, Ethernet, and solid Linux environment skills. This position is available in Bangalore, Hyderabad, and Ahmedabad. Roles and Responsibility Develop and implement verification environments using System Verilog and UVM. Verify IP, SOC, and pre-silicon designs. Collaborate with cross-functional teams to identify and resolve design issues. Create and maintain testbenches and testcases for verifying complex digital circuits. Analyze and debug verification results to ensure design quality. Participate in the development of new verificati...

Job Description: We're looking for a verification SME, responsible for the SoC verification process and designing the next-generation HBM DRAM products. Deep understanding of SoC Verification, testbench architecture, SoC verification methodologies, and 2.5D & 3D package integration. Responsibilities: • Develop test plans at SOC Level and analyze Coverage. • Build verification environments to verify complex SOCs. • Develop Random/Directed test in RTL and GLS environments. • Review architectural specifications to ensure high quality. • Work with customers to understand their verification &validation requirements • Debug and identify root causes and solutions for pre-silicon and post-silicon is...

As a member of the Front End CAD team, you will be responsible for the development, standardization and maintenance of engineering flows that enable system verification activities within the Solutions Engineering team, working with engineers from our project teams to help them deploy best-practise across a common set of requirements. The flows you will help to develop will include areas such as simulation, emulation and formal verification and advancements in machine-readable specifications to aid automation of standard methodology within SE, enabling our verification community to achieve the best possible results. You will collect and analyse verification metrics and work with tools from mu...

As a member of the Front End CAD team, you will work on the development, standardization and maintenance of our internal engineering flows that enable system verification activities within the Solutions Engineering team, working with engineers from our project teams to help them deploy best-practise across a common set of requirements. The flows you will help to develop will include areas such as simulation, emulation and formal verification and advancements in machine-readable specifications to aid automation of standard methodology within SE, enabling our verification community to achieve the best possible results. You will collect and analyse verification metrics and work with tools from ...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Main responsibilities : Acquire knowledge of the architecture and microarchitecture of the ASIC by studying specifications and interacting with the architecture and logical design teams. Participate in defining overall verification strategies and methodologies, and the required simulation environments. Develop, maintain and publish verification specifications. Write and perform closely test plans with the logical design team. Develop coverage models and verification environments using UVM-SystemVerilog / C ++ Monitor, analyze and debug simulation errors. Monitor and analyze simulation coverage results to improve tests accordingly thereby achieving coverage targets on time. Submit recommendat...

You have a job opportunity for the Manager / Senior Role Physical Design Engineer position in Hyderabad. Your primary responsibilities will include: - Performing IP/Block level PnR activities from Netlist to GDS-II - Demonstrating good knowledge of all PnR activities such as Floor-planning, Placement, CTS, Routing, Timing closure (STA), and signoff checks like FEV, VCLP, EMIR, and PV - Executing all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file - Handling signoff convergence, block-level Timing Signoff, ECO generation, and Power signoff - Having knowledge of high performance and low power implementation methods (preferred) - Expertise in ICC2/Fusion Compil...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Minimum Qualifications Previous experience working on complex high-performance RTL design, preferably on DSP or processor based sub-system. Expert in hardware (RTL) design in Verilog, System Verilog or VHDL. Knowledge of standard on chip bus interface protocols (AXI, APB, AHB) Experience with some of below. Model development (SystemC, or C++) RTL to gates synthesis (Synopsys DCG or Cadence Genus) Design rule and CDC checking (SVA assertions, Spyglass, 0-in) Work on high performance low power RTL design. Scripting languages (PERL, Python, TCL, C, etc.) PRINCIPAL DUTIES AND RESPONSIBILITIES: Develop micro-ar...

Candidates with 1-3 Yrs expertise in SV, UVM, Verilog, DV, RTL design knowledge. Preferred VLSI Diploma course mandatory.

As a Systems Engineer at Qualcomm India Private Limited, you will be joining the Engineering Group to analyze and evaluate GPU architecture and microarchitecture for optimizing performance and power consumption. Your responsibilities will include GPU power modeling, workload analysis, and developing tests for pre-silicon and post-silicon power verifications. You will work closely with RTL designers, architects, verification specialists, compilers, drivers, silicon implementation teams, and post-silicon teams. Knowledge of Graphics architecture is considered advantageous for this role. Key Responsibilities: - Analyze and evaluate GPU architecture and microarchitecture - Optimize performance a...

As Logic deisgn engineer for Power Management, you will be responsible for design and development of power management and sustainability features for high performance Processors chips. 1. Lead the Development of features - propose enhancements to existing features, new features, architecture in High level design discussions 2. Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, FW, SW, Research teams to develop the feature 3. Guide junior engineers. Represent as Power engineer in various forums. 4. Signoff the Pre-silicon Design that meets all the functional, area and timing goals 5. Participate in silicon bring-up and validation of the hardwar 6....

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-8 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC ver...