1587 Asic Jobs - Page 6

Your Impact Lead and mentor a team of verification engineers, driving the development of robust test benches, coverage plans, and constrained random tests. Ensure high-quality and reliable FPGA/ASIC designs through sophisticated verification techniques and comprehensive debugging. Contribute to the adoption and evolution of ground breaking verification methodologies like UVM/VMM, improving team efficiency and performance. Partner with architects, logic designers, and software engineers to align on architecture, micro-architecture, and system-level requirements. Play a pivotal role in delivering next-generation, high-performance FPGA and ASIC products for Ciscos networking solutions. Ensure p...

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

Your Impact You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock groups, exceptions, and clock exclusivity. Proficient in industry-standard SDC/STA tools and scripting for automation, you excel at identifying and resolving timing issues across all design levels. You will collaborate with Front-end and Back-end teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design closure. As part of this team, youll contribute to developing next-generation networking chips. Responsibilities include: Being a member of design team who oversees fullchip SDCs and w...

Role Overview: As an STA Engineer, your primary responsibility will be timing closure and verification of complex ASIC or SoC designs. You will collaborate closely with cross-functional teams, including physical design, logic design, and architecture, to ensure timing requirements are met across various design stages and process corners. Key Responsibilities: - Own full-chip and block-level timing closure across RTL, synthesis, and physical implementation stages - Develop and validate timing constraints (SDC) for blocks, partitions, and full-chip designs - Perform timing analysis using industry-standard tools (e.g., PrimeTime, Tempus) - Collaborate with design and architecture teams to defin...

As an ASIC/FPGA Designer, you will work closely with Algorithm and Architecture teams to understand and translate high-level algorithmic requirements into efficient hardware implementations. You will learn and analyze relevant protocols and standards, interpreting protocol specifications such as Ethernet, and applying them accurately in design. Your responsibilities will include: - Participating in all design stages, including micro-architecture definition, RTL coding (using Verilog/SystemVerilog/VHDL), and synthesis-friendly coding with timing-aware design. - Collaborating cross-functionally with the verification team for testbench development, debug support, and functional coverage closure...

Role Overview: You will be directing and managing a team of physical design engineers responsible for the physical design implementation of a chip design, subsystem, or block including clocking, timing, and integration. Providing guidance on physical design implementation and analyzing layout designs, power delivery, place, route, clock tree synthesis, and other aspects of physical design will be part of your responsibilities. You will manage the development of complex layout integrated circuit designs, simulation designs, RTL to GDS, logic synthesis, and oversee documentation for SoC development. Reviewing circuit layouts architectures and prototypes, ensuring issue resolution, and optimizi...

As a member of the team at Google, you will play a crucial role in developing custom silicon solutions for Google's direct-to-consumer products, contributing to the innovation that impacts millions globally. Your expertise in electrical engineering or computer science will be instrumental in shaping the future of hardware experiences, focusing on performance, efficiency, and integration. **Key Responsibilities:** - Create design constraints based on architecture/microarchitecture documents, understanding various external IO protocols. - Validate design constraints across multiple corners/modes using Fishtail/Timevision. - Utilize Primetime for running and validating constraints post synthesi...

Job Description Responsible for HW design and development of board product using ASIC/FPGA/MPSOC/uC and other devices, Design Document development, Component selection, Schematic entry, Symbol creation, Bill of materials (BOM) creation, Board Power estimate, Different design analysis, Circuit simulations Schematics and Layout review, Develop board bring-up and test documents Exp- 6 to 8 yrs NP- immediate to 30 days Location : Bangalore / Hyderabad

10–20 yrs exp in ASIC/SoC Physical Design. Must have hands-on PnR, STA, CTS, floorplanning, tapeout exp. Strong tool skills & team leadership a must. Location: Bangalore (priority)/Chennai/Hyderabad/Noida. Required Candidate profile PD engineer with 10+ yrs in ASIC/SoC design. Skilled in floorplanning, PnR, STA, CTS, tapeouts. Strong in timing closure, tool expertise & team mentoring. Prefers Bangalore, open to other metros.

Job Description Advantest is growing their global support team for its Automated Silicon Validation customers. You will support major semiconductor customers of SiConic solutions. Beyond proven soft-skills this role entails applying well-developed skills around chip bring-up and post silicon validation test development, debug and characterization. You will be part of a global team of SiConic engineers in support centers as well as at customer sites. Your duties General: Support the roll-out of the new SiConic solution that is based on V93000 technology to customers in your region and also world-wide customer base As a member of the Support Center team, you will consult customers & account te...

Job Description: Strong C programming skills Internals of Linux Experience on Cisco Nexus OS internals is an added plus Experience on boot loader like UBoot onto the board to initialize the SoC and memory Should have good understanding of DPDK Able to writeintegrate ASIC within the DPDK framework that interacts with Sundown and Marvel ASICs Experience working on embedded RTOS system involving designdevdebugging issues involve timing race conditions concurrency issues Knowledge on networking Layer2 layer3 protocolsroutingswitching is an added plus <

Job Description: Strong experience with the SONiC network operating system Stong knowledge on programming languages like Python and CC Good understanding of Linux internals and development environment Design development and maintenance Implementing new features and enhancements for the SONiC NOS platform Experience on SONiCs control and data planes working with the Switch Abstraction Interface SAI Testing and debugging Developing and executing test plans with Python and debugging issues across various SONiC platforms Participating in code reviews with architecture discussions and contributing to the SONiC opensource community Collaboration Working with hardware engineers test teams and other...

In depth knowledge of electrical engineering fundamentals including deep sub-micron CMOS device operation and characteristics, understanding of advancing modeling techniques Hands on experience with simulation using tools such as HSPICE, Finesim/PrimeSim or Spectre Understand any digital/mixed signal block such as SRAM, I/O using specification Define timing arcs like setup, hold, propagation delay Extract netlist through StarRCXT Ability to write SPICE test bench (compatible to simulators like HSpice, FineSim, Spectre etc) for any digital block from the scratch. Write measurement statements to get required timing and power data Run simulations using SPICE simulator Expertise in Perl, Shell, ...

We are seeking an exceptional STA Engineer to take a key role in our semiconductor designteam. As STA Engineer you will get opportunity to work with talented and passionate STAengineers and create designs that push the envelope on performance, energy efficiency andscalability. you will lead the STA for cutting-edge high speed and complex large ASIC. Youwill collaborate closely with cross-functional teams to ensure the successful delivery of highquality designs Responsibilities: Responsible for leading a team of STA engineers and close high frequency, lower tech node complex designs. Understand Design Architecture and timing requirements Develop timing constraints SDC and validate Work with ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

We're hiring! We're looking for a talented SONiC Networking Manager to join our team at Celestica in Chennai. If you have experience mentioned below and are interested in exploring this opportunity, we'd love to hear from you! Role Type: Full-time Experience Level: 10-20 years Location: Chennai (Hybrid) Detailed Description Team Leadership & Management: Lead, mentor, and manage a team of engineers working on the Network Operating Software (NOS) and SDK. This includes managing both full-time and contract employees. Platform & System Development: Oversee the bring-up of our NOS on new hardware platforms, including the development of Linux device drivers. Networking Stack Expertise: Provide tec...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ...

Job Title FPGA RTL Design Engineer Wireless ORAN Domain Location BLR client site Experience 10 to 12 years 2 Engineers 6 to 10 years 2 Engineers Total number of positions 4 About the Role RTL Design Engineers with deep expertise in telecom domain with exposure in ORAN. You will work closely with the customer to develop cutting edge ORAN equipment to cater to control plane and data plane implementations. Key Responsibilities Work with system architect to understand the requirements and design efficient RTL implementations targeting FPGAs. Translate MATLAB models to RTL for hardware realization MATLAB Simulink based modelling simulation and conversion to RTL Develop RTL architecture and microa...

Role Overview: As an ASIC/SOC Front End DV (Design Verification) Engineer, you will play a crucial role in the development of TB architecture definition and TB infrastructure/test coding for PCIe/Networking/IP Sub-Systems. Your responsibilities will include understanding product specifications, developing verification plans, test plans, coverage plans, assertions, and more. You will be expected to collaborate with team members, work on verification methodologies, and contribute to process improvements. Key Responsibilities: - Develop TB architectures and verification environments based on SV/UVM methodology - Create verification plans, test plans, coverage metrics, and assertions - Implement...

He/She should be able to do block level / top-level floor planning, PG Planning, partitioning (for hierarchical designs) , placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks and be able to fix the violations . S hould have worked on 4 5nm , 28nm or lower node designs with adv low power techniques such as Voltage Islands, Power Gating and substrate-bias. Provide technical guidance, mentoring to physical design eng inee rs. Interface with front-end ASIC teams to resolve issues. Excellent comm...

General Summary: Qualcomm is the world's leading developer of next generation of always on Display technologies and is committed to building a world-class organization that will lead the industry. Be part of the team developing next generation Display subsystems and Display peripherals. The ASIC Systems Architect is responsible for system architecture definition activities supporting a sophisticated multimedia Low Power Display subsystem catering to various market segments like mobile, XR, compute, IOT, Wearables and automotive products. Candidates will be responsible for all aspects of the ASIC hardware architecture definition/validation including the following: Owning end to end system arc...

General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. Qualcomm CDMA Technologies (QCT) is a global leader in Multimedia integrated circuits (ICs), software and systems for wireless consumer devices including Smartphones, Netbooks and E-readers. Our teams are developing advanced technologies to enhance mob...