561 Asic Jobs - Page 21

Develops RTL Designs within environments that have constrained timing and memory resources, designs and implements reusable code, performs design and code reviews, as well as tests and validates product implementations. Understanding of high-level software requirements and low-level software requirements. Capable of developing software verification test cases and test procedures. Analyse and enhance the efficiency, stability, and scalability of system resources. Good understanding of the embedded systems serial protocols (UART/ USB/SPI/i2C/ CAN Integrate and validate new product designs. Support software QA and optimize I/O performance. Provide post-production support. Interface with hardware design and development. Improve system efficiency and stability after development. Collaborate with customers to create systems based on their needs Requirements and skills: Bachelors degree in Electrical/Electronics/ Computer Engineering, Computer Science or a related field. Hands on Exp in RTL design in Verilog, VHDL, ASIC/FPGA experience If ASIC experience, then Lint/CDC tool experience If FPGA experience, then Xilinx or Altera/Intel , Microsemi FPGA parts and tools RTL debug experience Knowledge of at least one industry standard protocols like I2C/SPI/UART, PCIe, MIPI, AXI, Ethernet Adequate knowledge of reading schematics and data sheets for components. Strong interpersonal and writing skills. Ability to work as part of a team and as an individual. Exceptional analytical and problem-solving skills. Self-motivated and passionate about work and embedded systems.

AMD is looking for a specialized software engineer who is passionate about improving the performance of key applications and benchmarks . You will be a member of a core team of incredibly talented industry specialists and will work with the very latest hardware and software technology. THE PERSON: The ideal candidate should be passionate about software engineering and possess leadership skills to drive sophisticated issues to resolution. Able to communicate effectively and work optimally with different teams across AMD. KEY RESPONSIBILITIES: Work with AMD s architecture specialists to improve future products Apply a data minded approach to target optimization efforts Stay informed of software and hardware trends and innovations, especially pertaining to algorithms and architecture Design and develop new groundbreaking AMD technologies Participating in new ASIC and hardware bring up s Debugging /fix existing issues and r esearch alternative, more efficient ways to accomplish the same work Develop technical relationships with peers and partners PREFERRED EXPERIENCE: Engineers with at least 3 years of experience with BIOS, firmware, or system software development Good knowledge about ACPI, USB, PCIE, SATA and other PC industry standard Good at X86 assembly and C language Familiar with at least one BIOS code base (AMI, Insyde or UDK open source) UEFI experience is required Experience in BSP development/Boot loader (uBoot)/CoreBoot is a plus Experience in BIOS related tools development is a plus Experience in Video BIOS development is a plus. ACADEMIC CREDENTIALS: bachelors or Masters degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent

You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) Define, architect, code, and deliver verification suites/tests for ASICs that enable faster, denser, feature-rich systems. Use various front-end simulator tools (VCS/NC) to perform this activity. (25%) Verify large ASIC blocks independently and rapidly and sign off them for tape-out with analysis of code coverage, functional coverage and Gate level simulation. (30%) Work closely with logic designers to resolve bugs and software developers to assist in software and bring-up development. (10%) Develop Perl, Python and/or shell scripts to improve current verification infrastructure/methodology (5%) Required Skills: ASIC Verification using SystemVerilog Experience in constrained-random verification is a strong plus Experience with verification methodology like OVM/VMM/UVM Perl/Tcl scripting is strongly preferred Experience verifying networking protocols such as Ethernet is desirable Strong problem solving and ASIC debugging skills MSEE or BSEE is required with at least 12 years of ASIC VerificationExperience.

Job Description: Develops RTL Designs within environments that have constrained timing and memory resources, designs and implements reusable code, performs design and code reviews, as well as tests and validates product implementations. Understanding of high-level software requirements and low-level software requirements. Capable of developing software verification test cases and test procedures. Analyse and enhance the efficiency, stability, and scalability of system resources. Good understanding of the embedded systems serial protocols (UART/USB/SPI/i2C/CAN Integrate and validate new product designs. Support software QA and optimize I/O performance. Provide post-production support. Interface with hardware design and development. Improve system efficiency and stability after development. Collaborate with customers to create systems based on their needs Requirements and skills: Bachelors degree in Electrical/Electronics/Computer Engineering, Computer Science or a related field. Hands on Exp in RTL design in Verilog, VHDL, ASIC/FPGA experience If ASIC experience, then Lint/CDC tool experience If FPGA experience, then Xilinx or Altera/Intel , Microsemi FPGA parts and tools RTL debug experience Knowledge of at least one industry standard protocols like I2C/SPI/UART, PCIe, MIPI, AXI, Ethernet Adequate knowledge of reading schematics and data sheets for components. Strong interpersonal and writing skills. Ability to work as part of a team and as an individual. Exceptional analytical and problem-solving skills. Self-motivated and passionate about work and embedded systems.

Project Manager Design Job Description In your new role you will: Manage Silicon/Solution project through full life cycle from inception to mass production Lead product development projects with significant complexity, risk and noticeable impact for the Look at the bigger picture, with business in mind, in order to identify challenges and work closely with your stakeholders to come-up with solutions Conduct a forward-looking risk management to identify possible mitigation measures and/or backup scenarios Assume full responsibility for your projects by continuously assessing the progress and adjusting WCS organization Identify, scope, prioritize (drive, if necessary) manufacturing improvement in yield, quality, cost and capacity the project plan to ensure that goals are met even in the face of challenges. Your Profile You are best equipped for this task if you have: A degree in Electrical Engineering, Physics, Microelectronics or similar At least 6 years of professional experience related including 4 years of leading projects and project teams A formal PM certification (e.g. IPMA or PMI) or training or hands on Project Management experience is plus Hands-on project management experience in the arena of mixed signal ASIC development. Experience with IC Design, ASIC flow is a plus. Experience with larger cross functional projects and inter-disciplinary teams a plus. Leadership skills, a strong driver mentality and a proven ability for on-time delivery Experience in managing crisis situations and conflicts Great intercultural competencies and communication skills and bring your messages across with excellent English skills Ability to thrive in a matrix organization. Contact: Jyoti.vimal@Infineon.com #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant s experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

Expertise to work as an individual and as part of a team to deliver complex SoCs starting from the creation of the vectors, verification, an In your new role you will: ASIC flow understanding. The ability to work as an individual and as part of a team to deliver complex SoCs starting from the creation of the vectors, verification, and Post silicon debug. In addition, be self-motivated with the initiative to seek constant improvements in the DFT design methodologies . The candidate must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment. Scripting skills such as PERL/TCL/Python are preferred. You are best equipped for this task if you have: 8+ years of experience as Verification engineer. Knowledge of System Verilog. Experience with SOC level verification Experience in Tester failure debugs Excellent analytical and debugging skills. Basic knowledge in design techniques Verilog or VHDL A good knowledge of simulation flow UVM knowledge a plus Perl basics a plus Contact: swati.gupta@infineon.com #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant s experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

The ability to work as an individual and as part of a team to deliver complex SoCs starting from the creation of the DFT spec, implementation, verification, and Post silicon debug. Job Description In your new role you will: The ability to work as an individual and as part of a team to deliver complex SoCs starting from the creation of the vectors, verification, and Post silicon debug. In addition, be self-motivated with the initiative to seek constant improvements in the DFT design methodologies . The candidate must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment. Scripting skills such as PERL/TCL/Python are preferred Your Profile You are best equipped for this task if you have: ASIC flow understanding. Experienced in LEC, CLP, power analysis flow is preferred The ability to work as an individual and as part of a team to deliver complex SoCs starting from the creation of the DFT spec, implementation, verification, and Post silicon debug. In addition, be self-motivated with the initiative to seek constant improvements in the DFT design methodologies. The candidate must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment. Scripting skills such as PERL/TCL/Python are preferred Degree & Discipline: BE/B.Tech Electrical/Electronic or ME/M Tech in VLSI design. Experience in Industry: 8+ years of in DFT implementation, verification and post silicon debug areas Contact: swati.gupta@infineon.com #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant s experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

As CPU/Processor Nest Verification Lead, you will be responsible for the pre-silicon functional and performance verification of our chipsets, covering the CPU core, cache/nest subsystem, memory hierarchy, and other on-silicon IP used in our next-generation IBM Power Systems offerings. You will use state-of-the-art techniques to simulate and verify the designs of these custom microprocessor-based systems. The job uses both hardware and software engineering skills, and entails creating environments and methodologies for simulating the VHDL input, as well as analysis and problem debug. Verification is performed at various levels within the design hierarchy. A background in Electronics / Micro Electronics / Computer Science with strong programming skills is required. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise As a CPU/Processor Nest Verification lead, you will play a pivotal role in the pre-silicon functional and performance verification of our cutting-edge chipsets. Your responsibilities will cover a spectrum of critical areas, including the cache/nest subsystem, interrupt, Fabric, memory hierarchy, and various on-silicon IP integral to our upcoming IBM Power Systems offerings. Leveraging state-of-the-art techniques, you will be at the forefront of simulating and validating the designs of these bespoke microprocessor-based systems and providing technical guidance to junior/mid-level engineers in the team. Key Duties: Verification Environment Ownership:Take charge of the verification environments for microprocessor components, contributing significantly to the identification of functional and performance issues before silicon production. Implement best practices and innovative methodologies to ensure robust and efficient verification processes. Documentation and Communication:Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Communicate progress effectively, keeping team members and stakeholders informed of milestones achieved and potential challenges encountered.Lead the development of the verification plans, environment, testbenches and writing testcases for the Cache Coherency Transport Interconnect Fabric in IBM Server Processors. Technical leadership :Providing Technical leadership to the senior/mid-level engineers who will be working closely with you. Stakeholder management :Managing and influencing stakeholders technically, periodic update in status meeting/technical forums. Functional Verification Experience: 15+ years of extensive experience in functional verification of processors, demonstrating a deep understanding of verification methodologies and technically leading a large team. Computer Architecture Knowledge: Good understanding of computer architecture, including Processor core design specifications, Coherency and Cache Designs, Processor IO subsystem, Interrupt architecture, with expertise in at least any one of the above domains. Multi-processor Cache Coherency Transport Fabric :Experience in functional verification of system level Coherency Transport Network designs and ways to stress verify them. Strong programming skills :Proficiency in C++, Python scripting or similar languages. Preferred technical and professional experience Experience with Hardware Description Languages (HDLs): Proficiency in hardware description languages like Verilog and VHDL and general computational logic design and verification concepts. Experience in System-Level Verification: Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design. Experience in specifying and developing the verification infrastructure for verifying processor based designs. Minimum one full life cycle experience of a processor/SoC verification flow with focus on Coherency Transport Interconnect/Fabric Verification. Knowledge of system-level architecture including buses like AXI/ACE/CHI, AMBA interconnects

Engineer/Sr Engineer (Firmware/SW Driver development and Automation, System Validation) General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Job Description: - Develop complex drivers/Firmware for the critical SOC Ips - Develop system level test content to validate the driver/firmware for the system overall testing. - Understand overall SoC and IP Architecture . - Work with IP Design/Verification teams to understand the functionality and programming sequences. - Develop/port/enhance the software content and bring up. - Automation of Test content Job Requirements : - ~ 4 years Software Engineering experience or related work experience. - Excellent understanding of Embedded systems, Soc Architecture, Processor Architecture and Memory interfacing. - Excellent C/C++ expertise and hands-on experience on Firmware development/debug - Hands on experience on Python - Experience in DDR and other High speed protocols is added advantage. - Exposure to working on emulation/pre-si environment. - Using JTAG based debuggers , compilers/linkers

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Summary: Position for 5-8 years of experience in design verification of complex Qualcomm propriety DSP/NPU IP DSP team is responsible for delivering high-performance DSP/NPU cores which are at the heart of Qualcomm's multi-tier SoC roadmap targeted for mobile space, AI, Automotive and more. Qualcomm is one of the largest fabless semiconductor design companies in the world, generating over $35 Billion in annual revenues from chipsets and royalties from intellectual property. Job Responsibilities: Drive design verification of DSP IP by working with a global DSP design team involving architecture, implementation, power, post silicon and back-end teams. Implement and improve System Verilog/UVM Testbench Architecture. Develop and deploy new verification methodologies, automation to continuously improve quality and efficiency. Develop design corresponding test plans, architect and develop verification environments, and meet coverage goals. Hands-on simulations and ability to debug not only IP level, but Subsystem and SoC level fails and bugs. Complete all required verification activities at IP level and ensure high quality commercial success of our products. Assertions, simulation, formal verification (static property checking), HW-SW co-verification, constraint/HVL-based verification, simulation acceleration, emulation are all tools you will use on a daily basis. Responsible gate level simulation bring-up, gate level verification with timing simulations. Responsible for power aware RTL verification and gate level simulation. Skillset/Experience: 5-8 years experience in processor/ASIC design verification Solid background and understanding of Digital Design, Processor Architecture , Processor Verification and Power aware verification. Expertise in System Verilog Testbench Architecture and implementation. Experience in writing C based and assembly level testcases is preferred. Exposure to power aware implementation and verification using UPF is a plus. Experience with advanced verification techniques such as formal and assertions is a plus. Gate-Level Simulation and Debug "” 0-delay, timing annotated and power aware. Experience in System Verilog/UVM, and with simulators from Synopsys/Mentor/Cadence . Scripting/Automation Skills "” Perl, Python, Shell, Make file TCI . Solid analytical and debugging skills, strong knowledge of digital design and good understanding of Object Oriented Programming (OOP) concepts. Experience in Hardware verification languages (HVL) such as SystemVerilog testbench (OVM/UVM) and SystemC and Hardware description languages (HDL) such as Verilog, SystemVerilog is preferred. Experience in verification of Processor subsystems is preferred. Experience in creating validation suite and building automation. Should have excellent inter-personal and communication skills. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Bachelor"™s or Master"™s degree from a top-tier institute. 6-11 years of experience in physical design from product-based companies. Experience: Proven experience in managing complex subsystems and small teams. Proficiency in synthesis, place and route (PnR), and sign-off convergence, including Static Timing Analysis (STA) and sign-off optimizations. Job Requirements: Expertise in meeting demanding Power, Performance, and Area (PPA) requirements for complex subsystems/System on Chips (SoCs), place and route, and IP integration. Experience in low power design implementation, including Unified Power Format (UPF), multi-voltage domains, and power gating. Familiarity with ASIC design flows and physical design methodologies. Strong understanding of circuit design, device physics, and deep sub-micron technology. Experience working on multiple technology nodes in advanced processes. Proficiency in automation to drive improvements in PPA.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: About The Role : Job Summary: Position for 5-8 years of experience in design verification of complex Qualcomm propriety DSP/NPU IP DSP team is responsible for delivering high-performance DSP/NPU cores which are at the heart of Qualcomm's multi-tier SoC roadmap targeted for mobile space, AI, Automotive and more. Qualcomm is one of the largest fabless semiconductor design companies in the world, generating over $35 Billion in annual revenues from chipsets and royalties from intellectual property. Job Responsibilities: Drive design verification of DSP IP by working with a global DSP design team involving architecture, implementation, power, post silicon and back-end teams. Implement and improve System Verilog/UVM Testbench Architecture. Develop and deploy new verification methodologies, automation to continuously improve quality and efficiency. Develop design corresponding test plans, architect and develop verification environments, and meet coverage goals. Hands-on simulations and ability to debug not only IP level, but Subsystem and SoC level fails and bugs. Complete all required verification activities at IP level and ensure high quality commercial success of our products. Assertions, simulation, formal verification (static property checking), HW-SW co-verification, constraint/HVL-based verification, simulation acceleration, emulation are all tools you will use on a daily basis. Responsible gate level simulation bring-up, gate level verification with timing simulations. Responsible for power aware RTL verification and gate level simulation. Skillset/Experience: 5-8 years experience in processor/ASIC design verification Solid background and understanding of Digital Design, Processor Architecture , Processor Verification and Power aware verification. Expertise in System Verilog Testbench Architecture and implementation. Experience in writing C based and assembly level testcases is preferred. Exposure to power aware implementation and verification using UPF is a plus. Experience with advanced verification techniques such as formal and assertions is a plus. Gate-Level Simulation and Debug "” 0-delay, timing annotated and power aware. Experience in System Verilog/UVM, and with simulators from Synopsys/Mentor/Cadence . Scripting/Automation Skills "” Perl, Python, Shell, Make file TCI . Solid analytical and debugging skills, strong knowledge of digital design and good understanding of Object Oriented Programming (OOP) concepts. Experience in Hardware verification languages (HVL) such as SystemVerilog testbench (OVM/UVM) and SystemC and Hardware description languages (HDL) such as Verilog, SystemVerilog is preferred. Experience in verification of Processor subsystems is preferred. Experience in creating validation suite and building automation. Should have excellent inter-personal and communication skills. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Area: Engineering Services Group, Engineering Services Group > Program Management General Summary: Develops, defines, and executes plans of record, including:schedules, budgets, resources, deliverables, and risks. Monitors and drives the program from initiation through delivery, interfacing with internal and external stakeholders across functions on technical matters, as needed. Monitors budget/spending, on-time delivery, and achievement of program milestones. Represents the program and drives alignment across stakeholders. Minimum Qualifications: "¢ Bachelor's degree in Engineering, Computer Science, or related field. "¢ 5+ years of Program Management or related work experience. 12+ years experience in the semiconductor industry with 3+ years in Project/Program Management Good experience in Microsoft Tools like Excel, Power point, Word Must have strong interpersonal skills and be able to effectively communicate at all levels Sound knowledge and understanding of SOC design cycle, Development Process, and customer deployment Track record of proven leadership/management experience Process definition & implementation Minimum Qualifications: "¢ Bachelor"™s degree in engineering, Computer Science, or related field."¢ 3+ years of Program Management or related work experience."¢ 3+ years of working with operating budgets, resources, and/or project financials. Preferred Qualifications: "¢ Master's degree in Engineering, Computer Science, or related field. "¢ PMP Certification. "¢ 10+ years of Program Management or related work experience. "¢ 5+ years of work experience in a role requiring interaction with senior leadership (e.g., Director level and above). "¢ 3+ years of experience working in a large matrixed organization. "¢ 2+ years of experience with program management tools such as dashboards, Gantt charts, etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Be a member of the team that plays a significant role in ensuring the quality of Connectivity SoCs through structured DFT, Automatic Test Pattern Generation (ATPG) and Memory Built-In Self-Test (MBIST) techniques. Primary responsibilities will include,– Interface with design team to ensure DFT design rules and coverages are met. – Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques.– MBIST verification (including repair), test pattern generation through Mentor tool.– ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations.– Work with the Product/Test engineering teams on the delivery of manufacturing test patterns for ATE.– Responsible for supporting post silicon debug effort, issue resolution.– Responsible for Diagnostic Tool generation for ATPG, MBIST and bring-up on ATE.– Developing, enhancing and maintaining scripts as necessary Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum of 2-6 years"™ experience in ASIC/DFT "“simulation and Silicon validation– Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement– In depth knowledge and hands-on experience in ATPG -coverage analysis.– In depth knowledge of Memory verification, repair and failure root-cause analysis.– Experience with any of these tools is required– ATPG - TestKompress– MBIST - Mentor ETVerify– Simulation - VCS (preferred), modelsim.– Expertise in scripting languages such as Perl, shell, etc. is an added advantage– Ability to work in an international team, dynamic environment with good communication skills– Ability to learn and adapt to new tools, methodologies.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: Overview: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. Right candidate should be an excellent Python developer with hands-on embedded validation experience and will need to collaborate with software and hardware teams across geos to develop and enhance tools to model, debug and test various SoCs Minimum Qualifications: "¢ Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. "¢ 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Skills Expectations: Excellent C and Python development skills Expertise in Object Oriented Concepts and Design Strong experience in developing automation frameworks for embedded environments. Key understanding of software evaluation and automation techniques. Experience with chip bring up and sound knowledge of digital hardware along with ability to read board schematics Solid understanding of processor architectures including bus interfaces, power management, memory maps, etc. Knowledge of RTOS based environments required. Exposure to Zephyr is highly desired Excellent trouble shooting and analytical skills that may be applied to resolve potential system issues. Work experience with ASIC emulators is desired. Worked within a Continuous Integration process in a high-technology development environment Familiarity with internals of software development toolchains is a plus. Self-motivated, open minded, adaptable team player. Should have strong verbal and written communication skills. Skills Expectations: Excellent C and Python development skills Expertise in Object Oriented Concepts and Design Strong experience in developing automation frameworks for embedded environments. Key understanding of software evaluation and automation techniques. Experience with chip bring up and sound knowledge of digital hardware along with ability to read board schematics Solid understanding of processor architectures including bus interfaces, power management, memory maps, etc. Knowledge of RTOS based environments required. Exposure to Zephyr is highly desired Excellent trouble shooting and analytical skills that may be applied to resolve potential system issues. Work experience with ASIC emulators is desired. Worked within a Continuous Integration process in a high-technology development environment Familiarity with internals of software development toolchains is a plus. Self-motivated, open minded, adaptable team player. Should have strong verbal and written communication skills. Keywords: Python, OOPs, C, Security, Test, Automation Experience: 1-3 years of relevant industry work experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. We are looking for bright ASIC design engineers with excellent analytical and technical skills. This is an excellent opportunity to be part of a fast paced team responsible for delivering Snapdragon CPU design, flows for high performance SoCs in sub-10nm process for Mobile, Compute and IOT market space. Job Responsibilities: Participate on a project involved in the development of ASICs, with emphasis in Place and Route Implementation, Timing Closure, Low Power, Power Analysis and Physical Verification. Create design of experiments and do detailed PPA comparison analysis to improve quality of results, tuning recipes and setting course for the projects going forward Work closely with RTL design, Synthesis, low power, Thermal, Power analysis and Power estimation teams to optimize Performance, Power and Area(PPA) Tabulate metrics results for analysis comparison Develop Place & Route recipes for optimal PPA Minimum Qualifications 2+ years of High Performance core Place & Route and ASIC design Implementation work experience Preferred Qualifications Minimum 3+ years of experience in PD Extensive experience in Place & Route with FC or Innovus is an absolute must Complete ASIC flow with low power, performance and area optimization techniques Experience with STA using Primetime and/or Tempus is required Proficient in constraint generation and validation Experience of multiple power domain implementation with complex UPF/CPF definition required Formal verification experience (Formality/Conformal) Perl/Tcl, Python, C++ skills are needed Strong problem solving and ASIC development/debugging skills Experience with CPU micro-architecture and their critical path Low power implementation techniques experience High speed CPU implementation Clock Tree Implementation Techniques for High Speed Design Implementation are required Exposure to Constraint management tool and Verilog coding experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Principal Duties & Responsibilities Responsible for creation of "State of the art" UVM based verification test benches and methodologies to verify complex IP"™s and Sub-Systems. Define testplans, tests and verification infrastructure for modules, clusters and systems. Exposure to Power Aware Verification will be a plus. Build efficient and reusable bus functional models, monitors, checkers and scoreboards. Implement Functional coverage and own verification closure. Work with architects, designers, emulation and post silicon teams verification completeness. Good debugging & analytical skills. "¢ Applies advanced design rules and processes for electronic hardware, equipment, and/or integrated circuitry independently; has a basic understanding of other domains. "¢ Reads device specification sheets and interprets complex details required to design various hardware features; provides guidance to less experienced engineers working with spec sheets. "¢ Identifies advanced ways to optimize tests and/or hardware designs by evaluating device performance over a wide range of operating conditions and configurations. "¢ Evaluates complex design features to identify potential flaws (electrical, mechanical, hardware), compatibility issues, and/or compliance issues; advises less experienced engineers on design evaluations. "¢ Documents complex details about materials, components, chipsets, and functionality for a device while being mindful of potential compatibility, safety, and compliance issues; assists less experienced engineers in their documentation of these details. "¢ Troubleshoots advanced issues with product designs and finds solutions that are documented and shared with internal teams working on similar products. "¢ Provides essential technical input, support, and documentation for internal customers; advises less experienced engineers on how to provide support for clients. "¢ Acts as a tech lead on mid-sized to large projects and owns the outcome of the project. "¢ Manages project-related activities (e.g., meetings, documentation, deliverables) between their team and other teams working on the same or similar products, operating across locations and time zones; brings the project to conclusion. "¢ Utilizes deep understanding of Qualcomm products to evaluate and test hardware designs and identify unique components or functions that could potentially be filed for IP patents; shares these findings with their manager. "¢ Displays deep knowledge in a specific area; acquires advanced knowledge of industry trends, competitor products, and advances in various engineering fields from publically available information; shares knowledge with others on team and helps less experienced engineers understand and apply advanced concepts. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

About The Role : As SoC/System Debug specialist, the candidate will be part of a top-notch debug team for Intel post silicon server validation. Manual debug team will be gate keeper to ensure a healthy product quality release to internal and external customers. Responsibilities include systematic debug of complex failures at system level, designing the experiments to root cause the issues, co-ordinate with different teams for execution of experiments. Once the issue is root caused, work with design teams on work around and fix validation. The position will support various levels of experience with following qualifications. Works with architecture and design teams to implement different DFD methodologies and necessary hooks into SoC designs. This position will also mentor and coach other team members to develop necessary expertise and skills. Qualifications Bachelor's/Master's in Hardware Engineering or Electrical/Electronics Engineering or Computer Engineering or Computer Science with 10+ years of related work experience. Candidate must have high degree of hardware architecture/ microarchitecture experience in CPU/SoC/Chipset and a few of the subsystems/areas given below Strong knowledge and skills of Intel IA (IA32 architecture with uArch debug knowledge of Intel's Core and Uncore or equivalent architecture.) Passionate about working on CPU hardware and enjoys various levels of debugging Good data analysis skills and attention to details, Patient and disciplined problem-solving skills Expertise in CPU bring up, system level debug, root cause isolation, debug methodology and tools Knowledge of SOC level flows and deep understanding of some of the domains - CPU core, IOs, Coherency, reset, Power management, virtualization Understands System HW/FW/SW as a whole Excellent failure boundary minimization skills Must possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment. Optimizes debug process and drives systematic improvements in debug methods, tools and features based on expertise and debug findings. Hands-On experience of complex SoC sightings and exposure to running cross-team/site Task forces Knowledge on Debug Tools for JTAG, on chip trace features and ability to debug via OSC/LAs etc; Usage of any Post-Si debug tools (e.g., logic analyzers, oscilloscopes, things like ChipScope on FPGA's, etc.), usage of different Analysers/exercisers (PCIe etc.) Good working knowledge in C/C++/Python SW programming for content development and scripting Demonstrated collaboration skills working with different partner teams like design, architecture, firmware, tools, manufacturing teams during complex failures debug Excellent written and oral communications and experience working in a cross functional /cross geography team environment are essential Inside this Business Group The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intels offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements. Working Model This role will require an on-site presence. *

Key Responsibilities: Develop and prototype ASIC designs using FPGA platforms. Work with Verilog and digital logic design concepts for FPGA implementation. Design and validate system-level architectures, including ARM processor bring-up, AXI/AHB buses, and memory controllers (DDR/NAND). Contribute to peripheral emulation tasks (PCIE/USB experience is a plus). Debug and optimize FPGA implementations in a Pre-Si environment. Utilize FPGA synthesis tools (e.g., Synplicity or equivalent) for efficient design implementation. Work with Xilinx Virtex FPGA architecture and ISE tool flow. Develop and execute validation plans for FPGA builds. Collaborate in a UNIX environment, leveraging scripting languages like Perl or Shell for automation. Assist in Post-Si validation (preferred but not mandatory). Required Skills: Strong problem-solving and debugging skills on FPGA platforms. Experience with FPGA prototyping methodologies and validation techniques. Familiarity with system buses, memory controllers, and peripheral emulation. Ability to work efficiently in a UNIX-based development environment. Interested share resume or references to Shubhanshi@incise.in

Who Youll Work With You will engage in dynamic collaboration with verification engineers, designers, and cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle. Your Impact You will contribute to developing Cisco s revolutionary data center solutions by designing industry-leading complex chips, with full exposure to all aspects of our systems and applications, including silicon, hardware, software, telemetry, and security. Specific responsibilities include: Architect block, cluster and top-level DV environment infrastructure. Develop DV infrastructure from scratch for block and cluster level environments. Maintain and enhance existing DV environments. Develop test plans and tests for qualifying design at block, and cluster level environments with mix of constraint random and directed stimulus. Ensure complete verification coverage through implementation and review of code and functional coverage. Ensure RTL quality with qualifying the design with Gate Level Simulations on netlist. Collaborate closely with designers, architects, and software teams to address and debug issues during post-silicon bring-up, ensuring seamless integration and optimal performance. Support testing of design in emulation. Minimum Qualifications Bachelor s Degree in EE, CE, or other related fi eld. 5+ years of related ASIC design verification experience. Proficient in ASIC verification using UVM/System Verilog. Proficient in verifying complex blocks and/or clusters for ASIC. Experience building test benches from scratch, hands on experience with SystemVerilog constraints, structures and classes. Scripting experience with Perl and/or Python. Preferred Qualifications Master s Degree in EE or CE with 3+ years of related work experience. Experience with Forwarding logic/Parsers/P4. Experience with Veloce/Palladium/Zebu/HAPS. Formal verification (iev/vc formal) knowledge. Domain experience on one or more protocols (PCIe, Ethernet, RDMA, TCP).

As a Sr Advanced Hardware Engineer at Honeywell, you will lead and drive Gas Sensor testing and System development You will collaborate with cross-functional teams to define hardware test requirements and specifications and design complex hardware systems including Sense Die, ASIC, and controller Your role will involve performing sensor testing and validation to ensure product performance and reliability Additionally, you will provide technical guidance and support to junior engineers, stay updated with industry trends and technologies, and contribute to the overall success of hardware design projects In this position, you will influence the future of Honeywell as a global technology leader by driving innovation and delivering high-quality products We are seeking a Senior Advanced Test Engineer to join our Product Verification & Validation team at one of our Bangalore design centers Candidates with Research & Development (R&D) or New Product Introduction (NPI) experience are preferred The candidate will develop, and design test benches based on different gases (H2, Carbonate) and mixtures You will apply principles of chemistry, physics, and mathematics to solve problems involving detection, prevention, and prediction of safety failures due to leaks, thermal runaway, fire, and explosion (LEL) You will use your knowledge to run experiments and tests aiding in the development of Safety Sensors in Electrification & Gas Sensor Domain To learn more about Honeywell s Sensor business and products, please visit Honeywell Sensing Key Responsibilities: Gather estimates of the Test Systems Define test system architecture & Requirements Develop Test Systems for function, performance, and endurance of the product Perform laboratory testing Adjust and calibrate instruments Research new methods Design experiments Lead improvement initiatives Test and monitor performance of products Troubleshoot equipment and product issues Conduct analysis and prepare reports Strong analytical capabilities and good understanding of chemical engineering concepts Good understanding of thermodynamic principles, heat transfer, and other relevant areas of chemical engineering Hands-on approach requiring knowledge of and safe use of chemicals and gases, and chemistry lab tools Collaborate with a team of technicians, engineers, and scientists to design and execute experimental studies to validate and improve the performance of sensor prototypes Working knowledge of industry standards like ISO26262, IEC61508 Candidate Qualification: Bachelors degree in chemistry-related fields (e.g., organic chemistry, chemical engineering) Over 10 years of experience Expertise in electrochemistry, including fundamental understanding of electrochemical processes, electrode design, prototype validation, ink formulation, reaction kinetics, transport phenomena, and familiarity with electroanalytical methods such as cyclic voltammetry (CV) and electrochemical impedance spectroscopy (EIS) Proficiency in using computers for specification generation, technical evaluations, and electronic sharing of data across geographically separated work groups Effective communication skills with team members and other engineering personnel Ability to prioritize and manage multiple projects and support tool infrastructure and development Develop industry-standard gas sensor calibration methods accounting for temperature, humidity, pressure, and dynamic performance drift Evaluate response time, limit of detection, repeatability, and linearity Develop and execute test plans for gas sensors, including functionality, environmental stress, and performance testing Conduct failure analysis and root cause investigation to resolve design or manufacturing issues Collaborate with validation teams to test sensor accuracy, durability, and compliance with regulatory requirements Capability to work as part of a team Collaboration & Cross-functional Engagement: Work closely with software, firmware, and Systems engineering teams to ensure seamless integration of gas sensors into broader systems Coordinate with suppliers, manufacturers, and internal teams for prototyping, manufacturing support, and component sourcing Participate in design reviews and contribute to system architecture, design feasibility, and reliability Innovation & Continuous Improvement: Stay updated on the latest sensor technologies, materials, and industry trends Benchmark competitive products and integrate innovative features to differentiate the company s gas sensor solutions Contribute to the creation of intellectual property (IP) and patents related to gas sensing technologies Documentation & Compliance: Generate detailed design documentation, including specifications, test procedures, and validation reports Ensure compliance with industry standards, such as ISO/TS 16949, AECQ100, and relevant environmental or safety regulations Provide support for regulatory and certification processes, ensuring sensors meet required safety and environmental standards Customer Support & Troubleshooting: Interface with customers to understand requirements, provide technical support, and resolve field issues Participate in customer reviews and offer insights into sensor performance and integration within customer systems Candidate Qualification: Bachelor s degree in chemistry-related fields (e.g., organic chemistry, chemical engineering) Over 10 years of experience

AMD is looking for an influential software engineer who is passionate about improving the performance of key applications and benchmarks . You will be a member of a core team of incredibly talented industry specialists and will work with the very latest hardware and software technology. THE PERSON: The ideal candidate should be passionate about software engineering and possess l eadership skills to drive sophisticated issues to resolution. Able to communicate effectively and work optimally with different teams across AMD. KEY RESPONSIBILITIES: Work with AMD s architecture specialists to improve future products Apply a data minded approach to target optimization efforts Stay informed of software and hardware trends and innovations, especially pertaining to algorithms and architecture Design and develo p new groundbreaking AMD technologies Participating in new ASIC and hardware bring up s Debugging /fix existing issues and r esearch alternative, more efficient ways to accomplish the same work Develop technical relationships with peers and partne rs PREFERRED EXPERIENCE: 10 years of experience in software development in domains of networking, RDMA, or system software 10 years of experience in software development in domains of networking in one of the following areas: Software data plane applications such as VPP/equivalent. P4/u-code based data plane development RDMA transport development Strong object-oriented programming background, C/C++ preferred Ability to write high quality code with a keen attention to detail Experience with modern concurrent programming and threading APIs Experience working in different operating systems or server environments is a plus Experience with software development processes and tools such as debuggers, source code control systems (GitHub) and profilers is a plus Effective communication and problem-solving skills Experience in performance tuning and debugging system level issues Experience in DPU or AI-NIC development is a huge plus ACADEMIC CREDENTIALS: bachelors or M asters degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent

Put in dedicated effort to understand graphics concepts and enhance your verification expertise. Collaborate effectively within a team, demonstrating a willingness to learn and contribute. Take ownership of your tasks by planning, estimating, and tracking your progress. Assist in developing tests, sequences, checkers, scoreboards, and other components in UVM. About you Committed to making your customers, stakeholders and colleagues successful, you re an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. You re curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard. You\u0027ll have: Strong expertise in Digital Circuits and Verilog. Proficient in SystemVerilog and UVM, with a strong desire to further enhance skills in these areas. You might also have: Knowledge of Graphics, GPU, CPU, or SoC architectures. Experience with broader verification technologies, including formal property-based verification (FPV). Proficiency in coding and scripting using Python, TCL, Perl, SystemC, or C++

Responsible for building infrastructure for performance verification and verify performance of X86 processor. Writing specific targeted tests to measure the performance of the processor Involves having a deep understanding of processor micro-architecture and triaging performance issues in RTL and simulator Skillset Debug triage of failures from simulation and emulation environment for CORE or sub level regressions. Writing automatized triages in Perl/Ruby and creating tools using perl/ruby or AMD verification methodology (primarily in C++) to enhance the functional debug and triage process. On a need basis, work on Post-Si bug recreation PREFERRED EXPERIENCE: Experience: 3-15 years experience in processor/ASIC performance correlation. Experience in micro-architecture testing for modern high-performance processors. Experience in writing tests and building infrastructure that tests performance of modern processors. Experience in application performance analysis Programming/Scripting Skills C, C++, Perl, Python. Solid background and understanding of Digital Design, RTL design , improving model performance and Processor Architecture Strong troubleshooting, analytical and debug skills. Prior experience in performance correlation of Processor subsystems is a plus. Excellent knowledge of computer architecture with relevant research and project work or industry experience Strong programming skills (C/C++ and assembly) Basic knowledge of Verilog ACADEMIC CREDENTIALS: Bachelors/Masters in Computer Science/Electrical/Electronics Engineering with relevant course and research work

What you ll do: "Position s focus will be validation for Electrical Industrial Controls products. Enrich & foster climate of innovation to drive growth & accelerate capability development. This includes Contribution in product development & technology innovation by understanding product requirements, test design & develop feature enhancements and implementation of world class high performance Test Automation frameworks for electrical products using technologies like Python, with Hands on experience in validation of Industrial Communication protocols like Modbus, PROFIBUS, BACNet, EtherNet/IP and SmartWire-DT Lead the development of PLC programs, automation suites for communication protocols Lead Project, process, and overall technical execution on validation activities of product development. Collaborate with global product engineering team and perform validation scripting, test execution activities during project. Involved in technical reviews including architectural and detailed test design reviews. Train, develop and motivate colleagues on technical aspects demonstrating Right to Left thinking (starting with consideration for end user). About CPD: CPD has business worth 1bn USD+ and is focused on offering customers the right set of smart, connected components to form a complete solution to meet their application needs. This division is working in three integrated businesses: Power Components, Industrial Control and Bussmann" "Engage in architecting and development of Python based validation frameworks applications. Take lead in Build management, change management, and configuration management tools like JIRA/bamboo/Bit Bucket/SVN etc. Suggest and develop re-usable components and looks for continuous improvement opportunities in Electrical industrial control products. Share knowledge within the team and demonstrate flexibility working in parallel on multiple products. Develop an understanding of both technology and product concepts and articulate product and software Architecture. Ensure quality of delivery in accordance with the plan adhering to the standard practices used in agile/waterfall model. Experience in code reviews with team members for modules/tasks and ensuring that best practices and efficient coding standards are adhered to. Ensures compliance with CMMI ML3 process and agile ceremonies/work products, Management standards and guidelines Qualifications: 3+ years of experience in validation of industrial fieldbus communication protocols like EtherNet/IP, PROFIBUS, Modbus TCP, Webserver and SmartWire-DT B. E. Electronics / Electronics & Telecommmunications 3+ Skills: Experience in Python basesd script/automation suite desingn for protocols like PROFIBUS Hands-on experience in developing/writing test cases Understanding of PLC programming Excellent Python based scripting skills Experience in working in Agile Team & usage of tools like JIRA, BitBucket, JAMA. Excellent interpersonal and communication skills, particularly with respect to written and oral communication, including the ability to explain technical concepts. Sound Knowledge and experience with process frameworks (e. g. CMMI) including requirements management, defect tracking, build management, change management, and configuration management tools Experience collaborating with local / global stakeholders for Hardware/Software procurement, building test lab setups etc. Software FMEA Excellent communications skills. A high degree of aptitude, creativity is required. Desired: Understanding of PROFINET, NETX90 ASIC Platform, OPC-UA, MQTT, EtherCAT" Python, PLC, Industrial Fieldbus Communication Protocols Modbus, BACnet, EtherNet/IP, PROFINET, PROFIBUS, SmartWire-DT, RTOS Continuous Improvement, Creating technical proposals, stakeholder communication, process definition,