ASIC RTL (DSP) Design Engineer/Sr Lead/Staff/Sr Staff Qualcomm

1.0 - 5.0 years

0 Lacs

karnataka

On-site

As an experienced RTL designer, you will be responsible for working on complex high-performance RTL design, with a focus on DSP or processor-based sub-systems. Your expertise in hardware design using Verilog, System Verilog, or VHDL, along with knowledge of on-chip bus interface protocols such as AXI, APB, and AHB, will be essential for success in this role. Additionally, your experience with model development, RTL to gate synthesis, design rule checking, and scripting languages will be valuable assets. Key Responsibilities: - Develop micro-architecture, design, and program specific documentation - Design and model compute ASIC modules and sub-systems - Own RTL development, ensuring power, p...

Posted 1 month ago

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Principal / Sr Principal Verification Engineer Enphase Energy

15.0 - 19.0 years

0 Lacs

karnataka

On-site

Enphase Energy is a global energy technology company and a leading provider of solar, battery, and electric vehicle charging products. Since its establishment in 2006, Enphase has been at the forefront of innovation in solar power, enhancing its safety, reliability, and scalability. With the Enphase Energy System, individuals can generate, utilize, store, and even sell their own power. The company has a remarkable global presence, having shipped over 80 million products to 160 countries. In this role at Enphase, you will be part of a dynamic team focused on designing and developing next-generation energy technologies to contribute towards a sustainable future. The position requires your pres...

Posted 3 months ago

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ASIC Engineering Technical Leader Cisco

10.0 - 15.0 years

12 - 17 Lacs

Bengaluru

Work from Office

Our creative and versatile Physical Design team in Bangalore, India. As a member of our physical verification team, you will perform various types of physical verification checks (such as LVS, DRC, design-for-manufacturing, design-for-yield, design-for-reliability and lithography) at the chip and block level. You will collaborate with the CAD, Foundry Operations teams for flow bring up and validation. We work directly with the implementation team during the entire chip design cycle to drive signoff closure for tapeout. You will lead schedules and support cross-functional engineering efforts. You'll work on pad ring, bump, RDL design, and working with the package and floorplan teams. Technica...

Posted 6 months ago

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ASIC Engineering Director Indian Institute of Technology Delhi (IIT Delhi)

20.0 - 27.0 years

25 - 35 Lacs

Hyderabad

Work from Office

KEY EXPERTISE : - Seasoned ASIC Front End leader with 20 years of cross domain experience ranging from architecture, uArch, IP/Sub- systems/SOC/ chiplets design/integration, RTL coding, Synthesis, CDC, timing, power analysis, system/IP verification, Silicon Bring up. - Proven track record of leading the design and development of complex IPs, sub-systems, chiplets for SOCs in the multiple domains like PCIE, USB, UCIE, ARM/x86 CPUs, RISC-V, VPU/NPU, GPU, LSIO, NOC, Fabrics, AMBA buses, DRAM, SD/SDIO/eMMC etc. Responsible for defining the technical direction of ASIC designs and collaborating with cross- functional teams to ensure successful ASIC implementation. - Demonstrated strong leadership,...

Posted 7 months ago

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ASIC Engineering Director Indian Institute of Technology Delhi (IIT Delhi)

20 - 27 years

90 - 150 Lacs

Hyderabad

Work from Office

KEY EXPERTISE Seasoned ASIC Front End leader with 20 years of cross domain experience ranging from architecture, uArch, IP/Sub- systems/SOC/ chiplets design/integration, RTL coding, Synthesis, CDC, timing, power analysis, system/IP verification, Silicon Bring up. Proven track record of leading the design and development of complex IPs, sub-systems, chiplets for SOCs in the multiple domains like PCIE, USB, UCIE, ARM/x86 CPUs, RISC-V, VPU/NPU, GPU, LSIO, NOC, Fabrics, AMBA buses, DRAM, SD/SDIO/eMMC etc. Responsible for defining the technical direction of ASIC designs and collaborating with cross- functional teams to ensure successful ASIC implementation. Demonstrated strong leadership, project...

Posted 7 months ago

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