4.0 - 8.0 years

0 Lacs

karnataka

On-site

As a highly skilled and experienced SoC Management IP Design lead at Qualcomm India Private Limited, your role involves overseeing the development of all SoC Management IPs, primarily Debug and Timer IPs. Your responsibilities include creating micro-architecture specifications, IP design, verification, and ensuring technical leadership and management in the area of IP development and SoC Management Architecture. **Key Responsibilities:** - Lead and manage the development of SoC management IPs, primarily Debug and Timer IPs: IP Design, Verification, and Delivery. - Provide technical leadership and guidance to the IP development team. - Oversee the entire lifecycle of IP development, from conc...

Posted 3 weeks ago

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Debug IP Design Lead / MicroArchitect Qualcomm

5.0 - 9.0 years

0 Lacs

karnataka

On-site

You will be responsible for designing and developing Debug IPs focusing on CoreSight IP design. Your role will involve ensuring that the Debug IPs meet the required specifications and performance standards. You will utilize your expertise in RTL design using Verilog and/or SystemVerilog for complex SoC development. Additionally, you will apply your knowledge of Arm-based designs and/or Arm System Architectures to develop and optimize IPs. Collaboration with cross-functional teams, SoC integration & Architecture teams is essential to ensure successful IP delivery within specified timelines. Implementing rigorous verification processes to ensure that the IPs meet all functional and performance...

Posted 3 months ago

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IP Verification Engineer - Senior Design verification engineer - SoC verification engineer VlookUp Global Technologies

8.0 - 12.0 years

0 Lacs

karnataka

On-site

IP Verification Engineer -SoC Verification Engineer -Design verification Engineer- C Based System Verification engineer) experience: 8+ years location : Cambridge, United Kingdom, immediate joiners preferred Onsite opportunity JD: Responsibilities: Strong verification experience with knowledge of SystemVerilog, UVM System verification (C based) experience is a must. Good knowledge of testplan creation and tracking. Low-level programming experience including C and Assembler. Experience with full verification flow including coverage closure. Experience with ARM-based designs and/or ARM System Architectures AXI, CHI protocol knowledge,

Posted 3 months ago

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