5.0 - 10.0 years

25 - 40 Lacs

bengaluru

Hybrid

JD2 SoC Verification Engineer (Pre-Silicon DV with C Experience) Location : Bangalore / Pune / Noida (Hybrid/Remote options) Experience : 4 12 Years Job Description We are looking for SoC Verification Engineers to join our Pre-Silicon DV team. The ideal candidate should have hands-on SoC DV experience and good exposure to C-based verification . Key Responsibilities End-to-end SoC/IP verification Test plan creation, TB development, regressions, coverage closure. Work on debug subsystem verification at SoC level, collaborating with RTL, architecture, and software teams. Bring-up/debug SoC testcases, including power/clock/reset flows. Develop C/Assembly diagnostics for SoC-level scenarios. Drive coverage, assertion-based verification, debug failures, and closure. Work independently and also mentor junior engineers if required. Required Skills Strong in System Verilog, UVM , Assertions, Coverage. Good SoC level DV experience (not just IP-level). C/Assembly programming exposure (mandatory). Debugging at SoC level power/reset/boot/debug flows. Familiarity with ARM-based SoCs is a big plus. Scripting: Python/Perl/Shell for automation. Strong debugging skills with simulators (VCS, Questa, Verdi, etc.). Email : prabhu.p@acldigital.com WhatsApp : +91 8754387484 JD3 – Debug Subsystem Verification Engineer (ARM Coresight) Location : Bangalore / Pune / Noida (Hybrid/Remote options) Experience : 4 – 12 Years Job Description We are hiring Debug Subsystem Verification Engineers with expertise in ARM Coresight Debug & Trace . This role involves SoC-level verification of debug and trace flows, requiring strong collaboration with architecture and software teams. Key Responsibilities End-to-end debug subsystem verification at SoC level. Define Verification Plans, testcase bring-up, debug & trace flow validation. Validate ARM Coresight Debug & Trace IPs – Trace, DAPROM, Device Discovery, CXDT. Work closely with architecture and SW teams for debug requirements. Develop and debug C-based diagnostics for debug and trace flows. Drive GLS, Coverage closure, Assertion-based verification . Required Skills Strong SoC DV experience (debug/trace focus). Hands-on with ARM Coresight Debug & Trace Architecture . Good understanding of CXDT, Trace Unformatter, DAPROM, Device Discovery concepts . Proficient in System Verilog + UVM . Strong C programming skills (mandatory). Exposure to GLS, Low Power/UPF simulation is a plus. Tools: VCS/Questa, Verdi, ARM DS-5, Trace tools. Email : prabhu.p@acldigital.com WhatsApp : +91 8754387484

Posted 2 days ago

Apply

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.