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4.0 - 9.0 years
50 - 65 Lacs
bengaluru, beijing, arizona
Work from Office
B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Engineering. Expertise in mixed signal IC verification / design experience Expertise in analog and mixed-signal circuit topologies Define verification plan based on product specifications and application use-cases Develop top-level AMS test benches using Cadence / System Verilog / UVM framework Simulate and validate verification plan use-cases Work with design team to debug and support issues Manage bug tracking Create automated regression flows Document and organize regression results Conduct AMS waveform review master the full AMS verification process. Expert level proficiency (Oral + Written) in Chinese language is mandatory i...
Posted 1 week ago
2.0 - 7.0 years
5 - 12 Lacs
hyderabad
Work from Office
Description: Good knowledge of Basic Analog/Digital concepts. • Good knowledge of Verilog/SV concepts. • Experience in using spice simulation and digital simulation tools like Virtuoso, primesim, Finseim, Hspice, Xcellium, Simvision, Waveview. • Experience in understanding Spice simulation environment/Digital simulation environment, able to debug analog/digital design related issues. • Work experience in co-sim simulation designs is a plus. • Good scripting skills using perl, python is a plus. • Must possess good communication skills and ability to work well in a team. Bachelors with 2+ years of work experience or Post Graduate Degree in Electronics Engineering or related engineering field w...
Posted 1 month ago
5.0 - 10.0 years
12 - 20 Lacs
Bengaluru
Hybrid
Key Responsibilities: Lead verification of analog and mixed-signal IP blocks including: Bandgaps, LDOs, Buck (multi-phase) switching regulators Comparators and Functional Safety (FuSa) monitoring circuits Own and execute block-level verification plans with comprehensive coverage. Develop and maintain analog behavioral models using SystemVerilog Real Number Modeling (SV-RNM) . Verify embedded digital functionalities such as: CRC, Clock Monitoring, OTPs, Register Maps Communication Interfaces (e.g., SPI, IC) Write and implement SystemVerilog assertions and covergroups . Perform advanced debug at both RTL and schematic levels. Manage VSIF files and support regression execution. Perform coverage...
Posted 3 months ago
5.0 - 9.0 years
0 Lacs
karnataka
On-site
Company Overview Connectpro operates in the human-resources industry, specializing in recruitment and talent acquisition. Role And Responsibilities As a senior analog design engineer at Connectpro, you will be responsible for taking a subsystem of analog design through all phases of the design process. This includes: Creating the architecture of the analog subsystem Providing technical leadership to the team during execution Designing, simulating, and supervising the layout and verification processes Evaluating and debugging silicon samples You will be working with the latest Cadence analogue design tools including Virtuoso Composer, Verilog, HSPICE, and other PC-based tools like Matlab. The...
Posted 3 months ago
7.0 - 12.0 years
30 - 45 Lacs
Noida, Hyderabad, Bengaluru
Work from Office
Lead/Senior Analog Mixed-Signal (AMS) Engineers Layout / Verification / Design Locations: Noida | Bangalore | Hyderabad Experience: 7-12 Years Domain: Semiconductor | Analog Mixed-Signal | Custom IP & SoC Design Role Overview: We are hiring skilled and experienced professionals across AMS Layout , AMS Design , and AMS Verification disciplines to join our high-performance analog design team. You will contribute to the development of high-precision, low-power analog and mixed-signal IPs and subsystems targeted at next-generation SoCs in automotive, networking, and consumer electronics domains. Open Positions: Position #1: AMS Layout Engineer Responsibilities: Perform custom layout design of an...
Posted 5 months ago
4.0 - 9.0 years
30 - 45 Lacs
Bengaluru
Work from Office
Mirafra Technologies is hiring!! Experience Required: 4 to 12 years Location: Bangalore Application Email: swarnamanjari@mirafra.com Job Description • Top-level AMS IC verification using Verilog AMS methodology • Analog modeling using VerilogAMS, SystemVerilog (create new models and update functionality of existing models) • Create verification test specifications • Develop and execute top-level test cases, self-checking test benches and regressions suites • Update the verification environment (update verification components, drivers, checkers, scripts and Tcl procedures to his/her test needs) • Documentation of the work done and verification progress reporting • Written and verbal communica...
Posted 5 months ago
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