540 Analog Jobs - Page 21

Job Purpose To Maintain and upgrade the Equipment and facilities of Cell Manufacturing to meet safety requirements, quality and production targets with optimum Repair & Maintenance. 1. Managing the entire shift independently for high-volume Solar Photovoltaic cell manufacturing machines, equipment s while ensuring equipment s & personnel safety 2. Knowledge and hands-on experience of Wet Chemistry process & equipment s / Thermal process and equipment s / Metallization line process & equipment s / of Laser process and equipment s / Robot, Automation Tools / Knowledge of pneumatic systems & Low-cost automation systems 3. Should have good hands on experience in PLC (Must Have), SCADA, Robotics, Servo drives, Servo Motor, Stepper Motor, Encoders, pressure and Temperature transducers, Analog & Digital Sensors. 4. Should have good knowledge on Robots / Automation Lines on latest Technology used in Solar Cell mfg. related to Operations, Maintenance & Safety. He Should be able to provide solution for Process defects (Like - Cell Breakages, Scratches) linked to all Robots / Automation 5. Develop capabilities of associates towards proper execution of their jobs 6. Good interpersonal and communication skills

"> Search Jobs Find Jobs For Where Search Jobs ASIC Digital Design Engineer, Senior Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 8686 Remote Eligible No Date Posted 28/01/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: As an ideal candidate for the ASIC Digital Design Engineer, Senior role, you are a highly motivated and innovative individual with a deep understanding of ASIC development flow. You possess a strong theoretical and practical background in high-speed serializer and data recovery circuits. You are someone who thrives in dynamic environments and embraces the challenges that come with constant technological changes. You are self-motivated, proactive, and able to balance good design quality with tight deadlines. Your excellent communication skills enable you to interact seamlessly with different design groups and customer support teams. You are known for your ability to resolve issues creatively and exercise independent judgment in selecting methods and techniques to obtain solutions. You are a team player who can produce excellent results both as an individual and as part of a team. What You ll Be Doing: Developing and verifying digital designs for next-generation NRZ and PAM-based SerDes products. Running lint/cdc/rdc checks and synthesis flow. Working with Verilog and VCS to ensure design accuracy. Defining synthesis design constraints and resolving STA issues. Collaborating with mixed-signal engineers to deliver high-end mixed-signal designs from specification development to functional and performance tests. Interacting with Application Engineers for customer support and resolving technical issues with Analog and P&R teams. The Impact You Will Have: Contributing to the development of cutting-edge SerDes products that lead the industry. Enhancing the performance, power, and size efficiency of our silicon IP offerings. Enabling rapid market entry for differentiated products with reduced risk. Driving innovation in high-speed digital design and data recovery circuits. Supporting the creation of high-performance silicon chips and software content. Collaborating with a world-class team to solve complex design challenges. What You ll Need: BSEE or MSEE with a minimum of 2 years of experience in digital design and front-end flows. Proficiency in running lint/cdc/rdc checks and synthesis flow. Experience with Verilog and VCS. Knowledge of digital design methodologies, DFT insertion, synthesis constraints, and flows. Scripting experience in Shell, Perl, Python, and TCL (preferred). Who You Are: Excellent communicator with the ability to interact with diverse teams. Self-motivated and proactive, with a strong attention to detail. A creative problem-solver who can think independently. Capable of working under tight deadlines while maintaining high-quality standards. A team player who can contribute effectively both individually and collaboratively. The Team You ll Be A Part Of: Join our highly experienced mixed-signal design and verification team, where you will work alongside experts in digital and mixed-signal engineering. Our team is dedicated to developing innovative solutions for the next generation of high-speed SerDes products, providing continuous training and opportunities for growth. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Job Purpose Responsible for developing, managing, and collaborating on a Plan with NXP Distribution partners across the region to grow the local business and drive the highest satisfaction and mindshare. To be able to understand NXPs global, and regional marketing and sales strategies and position NXP with the Distribution channel partners Principal Responsibilities Working with both distributor s management team and operation team, the DBM shall be able to align the vision of distributor to ensure they have a clear understanding on NXP s direction Define and execute sales and marketing strategies with Channel Partners. Negotiate with decision-makers in the Global sales and business line to maximize revenue. Provide feedback on current and future requirements from the mass market. Work with channel partners on the key matrix of growing customer count, Design Win, and revenue KPIs assigned to the partner. Develop NXP s new product & solution introduction plans for the channel partners to execute with mass market customers. Education Bachelor s Degree in Electronic Engineering or equivalent. Experience At least 8 years of distribution sales experience in semiconductor product and solution selling including MCU s , MPU s and Analog products. Excellent communication, presentation and negotiation skills. Ability to plan and execute in near term and long term. Strong track record in business development and revenue growth. High dependability, be there to support the business, service mindset. Thrives in a high-pressure environment and accepts absolute personal responsibility to deliver what is expected. Knowledge of distribution terminology. Self-starter with strong organization and planning skills Strong collaboration with a team to achieve company objectives in a team environment. More information about NXP in India... #LI-7013

> If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates. Requisition ID: 74922 Description Responsibilities Work with a dedicated team, verifying analog and mixed-signal building blocks for SOCs, with a focus on the portable, ultra-low power audio markets. Participate in all aspects of the mixed-signal design verification, in partnership with the design engineering team, to develop and implement a mixed-signal verification infrastructure to verify all functional and performance requirements. Required Experience and Skills 5-10 yrs of relevant industry experience Insatiable curiosity to learn about new circuit architectures to advance ultra-low power audio devices A keen understanding of modern mixed-signal verification challenges and solutions. Solid foundation in network theory, amplifier design and data converters. Experience developing RNM behavioral models using System Verilog/VerilogAMS for analog blocks like analog/digital PLLs, ADCs, DACs, LDOs. Experience developing and maintaining chip level performance simulations of mixed-signal SOC designs. Ability to create and maintained mixed signal verification plans based on early system specifications or incomplete design definitions. Competent in the Cadence Virtuoso environment to setup and execute parameterized simulations of analog and SOC designs. Experienced in producing detailed technical reports and documentation. Experienced in Low-power audio amplifiers (Class D), audio converters, audio interfaces (I2S, PDM), and audio performance metrics (Dynamic Range, SNR, THD) is highly preferred. Experienced in Flow automation using command line scripts using Python, Matlab, Ocean, Perl, Csh, Make, etc. Simulation performance and accuracy trade-offs based on design requirements Experienced in Power-aware mixed-signal verification Hands-on verification of sub-45nm CMOS SOC designs Desired Experience and Skills Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law. Job Segment: Electrical Engineering, Design Engineer, Telecom, Telecommunications, Network, Engineering, Technology

Job Summary: We are looking for a proactive and technically skilled IT Assistant to support our IT infrastructure with a focus on CCTV systems and network cabling. The ideal candidate will have hands-on experience in installing, maintaining, and troubleshooting CCTV systems as well as laying and managing structured cabling for IT networks. Key Responsibilities: Install, configure, and maintain CCTV systems (IP and analog). Perform regular inspections and maintenance of surveillance equipment. Troubleshoot issues with CCTV hardware, software, and network connectivity. Lay and terminate LAN, Fiber optic, and coaxial cables as required. Maintain accurate documentation of cable routes, CCTV setups, and network changes. Assist the IT team in daily technical support tasks including desktop support, printer setup, and basic network troubleshooting. Ensure compliance with safety regulations during installation and maintenance work. Support asset inventory and IT equipment tracking. Requirements: Proven experience in CCTV installation and configuration (at least 1-2 years). Good understanding of cable types (Cat6, fiber, coaxial) and their proper installation techniques. Basic knowledge of network topologies and IP configurations. Ability to use tools like cable testers, crimping tools, drills, and ladders. Strong attention to detail and a proactive approach to problem-solving. Willingness to work at heights and in varied environments when required. Preferred Qualifications: Diploma or certification in IT, Electronics, or related fields. Note This role would require some travel to our other properties in the South region. Food and accommodation while travelling will be provided by the company.

Hiring Freshers Kickstart Your Career in VLSI At PRSsemicon Technologies, we are shaping the future of semiconductor innovation by building a Global Capability Development Centre. We are looking for fresh graduates passionate about VLSI domains to join our team. Through structured training and hands-on experience, we ensure you gain the technical expertise and industry-relevant skills required to succeed in this dynamic field. Your Journey with Us: Comprehensive Training Gain in-depth knowledge of VLSI design, verification, emulation, DFT, physical design, and analog design based on project needs. Hands-on Experience Work with industry-standard tools and methodologies. Expert Guidance Learn from seasoned professionals and build practical expertise. Live Project Transition Successfully complete training and contribute to real-world chip design projects. What We Look For: Strong fundamentals in Digital Electronics. Eagerness to learn and build competency before taking on project responsibilities. Passion for VLSI design and a commitment to a long-term career in semiconductors. Why Join PRSsemicon? Be part of Indias thriving semiconductor industry. Learn from experienced professionals in a structured training environment. Get hands-on exposure to cutting-edge chip design projects. Headquarter: Chennai Mode: Offline/Online/Hybrid (as per project requirements) Eligibility: B. Tech/M. Tech in ECE, EEE, E & I, VLSI, or related fields Year of passing out: From 2022 and below (2021, 2020.. ) will be considered Apply Now & Shape the Future of VLSI with Us!

Identify and define architecture-level design blocks, and implement corresponding electronic circuits to meet required specifications and functionality. Create high-quality schematics and PCB layouts using industry-standard design tools such as Altium Designer , Mentor PADS , or equivalent. Design, develop, and test electronic circuits for a range of applications, including SMPS , PoE switches , IoT devices , and Ethernet switches (experience with Ethernet switch design is a strong advantage). Apply sound knowledge of fundamental electronic components such as MOSFETs , transistors , diodes , and logic gates in circuit design and analysis. Demonstrate hands-on experience in circuit development using microcontrollers like ESP32 , MSP430 , PIC , STM32 , and REALTEK 83 series. including circuit simulation and real-world testing. Integrate and interface various peripherals and modules such as HMI displays , temperature sensors , motion detectors , and cameras . Proficient in multiple communication protocols including UART , USART , I2C , CAN , Bluetooth , USB , Wi-Fi , and Ethernet . Possess in-depth knowledge and practical experience in EMI/EMC testing and compliance. Provide technical guidance and mentorship to J unior engineers , supporting their design, testing, and development efforts. Operate standard lab testing equipment such as DSOs (Digital Storage Oscilloscopes) , digital multi meters , function generators , and other diagnostic tools.

Validation and Embedded Engineers Job Category: Validation Job Type: Full Time Job Location: Bangalore Camera and Display subsystem, Memory subsystem, Memory Management, ARM Architecture Capabilities and Experience: Bachelor s degree in Electrical Engineering or Computer Science with 5+ years of relevant experience, with minimum 3+ years in silicon validation Silicon Validation experience, developing stress test plans and content, silicon validation frameworks or related infrastructure, debugging skills. Experience in validating hardware features for SOC (display system, memory subsystem, memory management) Familiarity with ARM CPU Architecture Caching and Coherency protocols knowledge Performance Validation Experience Expertise in Security protocols and architecture e.g., IOMMU, Access control, Encryption etc. Firmware Development Strong knowledge of OS Fundamentals, Multi-threaded embedded programming Experience in Bare Metal testing. Validation experience of protocols using software on chip blocks, specifically camera, CSI PHY, ISP, display protocols DSI and DP Pre and Post Silicon SoC level expertise on data-chains, DMAs, fabric etc. Proficiency in JTAG Debugger languages- Lauterbach PRACTICE with experience of debugging complex systems and performance bottlenecks. Ability to measure various analog parameters in the lab with highspeed oscilloscopes and other lab equipment. Ability to write and execute memory related tests to establish functional health of our SoCs on silicon, both under normal and PVT conditions. Good understanding of validation fundamentals. Solid understanding of emulation technologies. Familiarity with emulators and waveform-based debugs. Programming Skills- Assembly, mixed assembly programming, C, C++ Scripting Python, shell scripting Microsoft excel tools for report generation /graphs. Responsiblities: Building emulation models, running, and debugging test cases, resolving environment issues, and driving emulation and acceleration capabilities for pre- and post- silicon validation in platforms like Synopsys Zebu or Cadence Palladium Drive report generation, analysis of memory margins across PVT Drive the post silicon bring up and validation activities for the DRAM. Execute the DRAM validation, margin data collection, stress testing across PVT. Team player and a mentor who is self-driven, motivated. Responsible for quality and timeliness of the team output

1.CAD Engineer experience. 2. Must have skill is Python and PyQT or QT for Python 3. Software development experience is preferred 4. Some EDA tool experience is a must 5. Development experience in any of the Digital or Analog.

An experienced and passionate Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert with a strong background in PLL and SERDES design. You have a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction. Your expertise includes circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive structure, and interconnect failure modes in advanced finfet technology nodes. You excel in developing Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology. You thrive in collaborative environments, working closely with silicon test and debug experts to advance quality through Sim2Sil correlation. You are also passionate about building and nurturing key analog design talent to grow business impact through successful project execution. What you'll Be Doing: Leading Serdes analog design and development. Analyzing various mixed signal techniques for power reduction, performance enhancement, and area reduction. Developing Analog Full custom circuit macros for High Speed PHY IP in advanced technology nodes. Collaborating with silicon test and debug experts for Sim2Sil correlation. Building and nurturing a team of analog design talent. Working with experienced teams locally and globally. The Impact You Will Have: Driving innovation in mixed-signal analog design. Enhancing the performance and efficiency of high-speed physical interfaces. Contributing to the development of cutting-edge technology in High Speed PHY IP. Improving quality and reliability through collaboration and Sim2Sil correlation. Growing the business impact by building and leading a talented team. Advancing Synopsys leadership in chip design and IP integration. What you'll Need: BE 18+ years of relevant experience or MTech 15+ years of relevant experience in mixed signal analog, clock, and datapath circuit design. Strong knowledge of RF architecture and blocks such as transceivers, VCOs, LNA, and up/down converters. Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits. Proficiency in high-speed digital circuit design and timing/phase noise analysis. Ability to create behavioral models of PLL to drive architectural decisions. Who You Are: Strong fundamentals of CMOS, device physics, and sub-micron design methodologies. Experience with PLL designs and high-speed digital circuit design. Knowledge of control systems, band gaps, bias, op-amps, LDOs, and feedback techniques. Experience in LC VCO/DCO design and performance parameters of VCO. Familiarity with digitally assisted analog circuit techniques. The Team you'll Be A Part Of: You will be joining an expanding analog/mixed-signal serdes team involved in the design and development of cutting-edge High Speed PHYSICAL Interface Development. You will work with experienced teams locally and with colleagues from various sites across the globe, fostering a collaborative and innovative environment.

"> Search Jobs Find Jobs For Where Search Jobs Analog Design, Staff Engineer Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 5365 Remote Eligible No Date Posted 23/08/2024 Qualifications: Key Qualifications: Btech/Mtech with 4 -10 years of SerDes/High-Speed analog design experience. Experience in design of Analog front-end transceivers, voltage/current-mode drivers , delay-locked loop, phase-locked loop, Regulators, Equalizers (CTLE, FFE, DFE), Impedance calibrators, serializer , De-serializers , voltage-controlled oscillator, phase interpolator, bandgap reference, Clock data recovery circuits, Injection locked Loop etc. Hands ON experience with spice simulations and various sub-micron design methodologies. Familiarity with automation / Scripting language(TCL, PERL). Silicon-proven experience implementing circuits for analog and mixed-signal building blocks. Can micro architect circuit from specifications, can create simulation benches to verify the specification, can understand and debug circuit. Experience optimizing CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of local device mismatch and proximity effects. Awareness of ESD issues (i.e. circuit techniques, layout). and design for reliability (i.e. electro-migration, IR, aging, etc.). JOB Responsibilities Ensure analog sub-block performance adheres to SerDes standards and architecture document specifications. Identify and refine circuit implementations to achieve optimal power, area and performance targets. Propose design and verification strategies that use simulator features to ensure highest quality design. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Collaborate with digital RTL engineers on the verification of calibration, adaptation and control algorithms for analog circuits. Present simulation data for peer and customer review. Ownership of analog and mixed-signal building block that is integrated as part of a larger SerDes design. Document design features and test plans. Consult on the electrical characterization of your circuit within the SerDes IP product. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

An Analog Design engineer works on conceptualizing, designing and productizing state of the art analog sensors. We are seeking an experienced, highly motivated, and high-caliber individual to work on design of on-chip Process, Voltage, Temperature, Current and Droop sensors as part of PVT sensor group. This individual should have strong technical experience in full custom analog/mixed-signal circuit design, circuit simulations, custom layout and post-silicon characterization. Additional responsibilities include: Development of new solutions in the field of on-die monitoring Liaising with layout team to achieve best possible engineering solution Deployment of new sensors into test chips and post-silicon characterization Guiding more junior engineers and tracking their work Job Requirements Design oriented and forward-looking thought process Sound knowledge of custom Analog/AMS design techniques, implementation and verification B.Tech. or M.Tech. degree in Electrical Engineering with 5+ years of relevant industry experience or Phd with relevant experience. Awareness of full custom layout techniques Exposure to advanced process challenges, including ESD and Reliability Exposure to architecture, design and verification of PVT, Oscillators, Bandgap, PLLs, LDOs, ADCs, Amplifiers, PHYs and other Mixed-signal blocks Excellent teamwork, communication, mentoring, and interpersonal skills with both internal teams and external customers Preferred skills : Strong custom design experience - specification, circuit design description and schematics Hands on experience with circuit design & simulation tools, IC design CAD packages - from any EDA vendor Strong understanding of SPICE simulator concepts and simulation methods Familiar with circuit simulation tools like PrimeSim, FineSim, HSPICE or similar Must have prior experience with Custom Compiler or equivalent schematic & Layout editor tools Experience with statistical design methodology like generating and analyzing Monte-Carlo results Awareness of post-layout extraction & simulation, testing in conjunction with silicon validation Demonstrated technical expertise in the productization of advanced technologies

You are a highly motivated and experienced Analog Design Engineer with a passion for developing state-of-the-art analog sensors You thrive in a collaborative environment and have a knack for solving complex problems Your strong technical expertise in full custom analog/mixed-signal circuit design, circuit simulations, custom layout, and post-silicon characterization sets you apart You are a forward-thinking individual who is always looking for innovative solutions and has excellent communication and mentoring skill You possess a BTechor MTech degree in Electrical Engineering with over 5 years of relevant industry experience, or a PhD with relevant experience You have a deep understanding of custom Analog/AMS design techniques, implementation, and verification, and you are familiar with the challenges of advanced processes, including ESD and reliability What You ll Be Doing: Developing new solutions in the field of on-die monitoring. Liaising with the layout team to achieve the best possible engineering solutions. Deploying new sensors into test chips and conducting post-silicon characterization. Guiding and mentoring junior engineers and tracking their work. Conceptualizing, designing, and productizing state-of-the-art analog sensors. Collaborating with cross-functional teams to ensure successful project execution. The Impact You Will Have: Contributing to the development of next-generation intelligent in-chip sensors. Enhancing the performance, power, area, schedule, and yield of our customers products. Improving the reliability of various target applications through innovative solutions. Advancing the field of on-die monitoring with cutting-edge technologies. Driving the integration of full hardware IP, test, and end-to-end solutions. Supporting the continuous technological innovation that powers the Era of Smart Everything. What You ll Need: Strong technical experience in full custom analog/mixed-signal circuit design. Proficiency in circuit simulations and custom layout techniques. Experience with post-silicon characterization and deployment of new sensors. Sound knowledge of custom Analog/AMS design techniques, implementation, and verification. Awareness of advanced process challenges, including ESD and reliability. Who You Are: A forward-thinking engineer with a design-oriented mindset. An excellent team player with strong communication and interpersonal skills. A mentor who can guide and support junior engineers. A problem solver who thrives in a collaborative environment. A lifelong learner who stays updated with the latest industry trends and technologies.

Review SerDes standards to develop analog sub-block specifications. Identify and refine circuit architectures to achieve optimal power, area, and performance targets. Propose design and verification strategies that efficiently use simulator features to ensure the highest quality design. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Present simulation data for peer and customer review. Document design features and test plans. Consult on the electrical characterization of your circuit within the SerDes IP product. Propose solutions for post-silicon design updates. The Impact You Will Have: Drive innovation in high-speed analog integrated circuit design. Ensure optimal performance, power efficiency, and area utilization of our products. Contribute to the development of industry-leading SerDes IP. Enhance the reliability and quality of our analog sub-blocks. Support the successful integration of SerDes IP into customer products. Foster collaboration and knowledge sharing within the R&D team. Influence design strategies and best practices within the organization. What You ll Need: BE with 8+ years of relevant experience or MTech with 6+ years of relevant experience in Electrical Engineering or Computer Engineering. In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals. Detailed design experience with at least one, and familiarity with several other SerDes sub-circuits. Awareness of ESD issues and circuit techniques for addressing them. Familiarity with custom digital design and high-speed logic paths. Knowledge of design for reliability, including EM, IR, and aging considerations. Experience with tools for schematic entry, physical layout, and design verification. Hands-on experience with physical layout of high-speed circuits is a plus. Proficiency with SPICE simulators and simulation methods. Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control / data-capture. Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB is desired. Who You Are: Collaborative and able to work effectively in a team environment. Detail-oriented with a strong focus on quality and reliability. Proactive problem-solver with innovative design strategies. Excellent communicator with strong documentation skills. Adaptable and able to thrive in a fast-paced, dynamic environment

Lead the architecture and development of analog/mixed-signal blocks for PCIe 6 and PCIe 7 PHY designs. Ensure designs meet PCIe protocol standards, optimizing for performance, power, and area targets. Oversee the porting of PHY designs to different technology nodes, maintaining signal integrity and performance. Collaborate with cross-functional teams to integrate analog circuits into larger SerDes PHY systems. Develop and implement verification strategies for high-speed analog/mixed-signal circuits using advanced simulation tools. Supervise physical layout to minimize parasitics, device stress, and process variation impacts. Review simulation and measurement data for design validation and compliance with PCIe standards. Provide technical leadership and mentorship to junior engineers in analog/mixed-signal design best practices. Document design features, specifications, test plans, and methodologies for future reference. Collaborate with the characterization team to validate the electrical performance of circuits in silicon. The Impact You Will Have: Drive the development of next-generation PCIe 6 and PCIe 7 PHY designs, contributing to the advancement of high-speed interface technology. Ensure that Synopsys analog/mixed-signal circuits meet stringent industry standards, enhancing the companys reputation for excellence. Facilitate the seamless integration of analog circuits into complex SerDes PHY systems, improving overall system performance. Mentor and develop junior engineers, fostering a culture of continuous learning and innovation within the team. Contribute to the successful porting of PHY designs across different technology nodes, ensuring versatility and adaptability. Enhance the companys design verification processes, leading to more robust and reliable high-speed analog/mixed-signal circuits. What You ll Need: PhD with 5+ years, or MTech/MS with 10+ years of experience in analog/mixed-signal circuit design, with a focus on high-speed interfaces such as PCIe 6/7 or SerDes PHY designs. Extensive experience in transistor-level design of high-speed analog building blocks, such as LDOs, Bandgap references, ADC/DAC, PLLs, DLLs. Proven silicon experience in developing PHY circuits that meet strict PCIe standards. Expertise in high-speed SerDes AFE (Analog Front-End) development, including CTLE and CDR design. Experience designing high-speed SerDes transmitters, with in-depth knowledge of equalization techniques (e.g., DFE, FIR filters, TX pre-emphasis). Strong background in jitter budgeting analysis, including understanding the sources of jitter and strategies for minimizing its impact on signal integrity. Extensive experience with the porting of PHY designs across different technology nodes. Strong expertise in CMOS technologies, including finFET and SOI processes. In-depth understanding of the PCIe protocol, signal integrity requirements, jitter performance, and high-speed clocking. Proven ability to supervise layout design to minimize the effects of parasitics, process variations, and electromigration. Demonstrated ability to lead and mentor design teams, working across departments to ensure successful project outcomes

Leading the development of next-generation DDR/HBM/UCIe IP. Providing guidance and mentorship to team members, ensuring project schedules are met and problems are resolved efficiently. Acting as a project leader, contributing to complex aspects of IP development. Developing and maintaining project schedules, collaborating with cross-functional teams. Designing and verifying CMOS circuits and layouts. Implementing analog mixed-signal simulation strategies and ensuring signal integrity. The Impact You Will Have: Driving the development of cutting-edge IP that powers the future of technology. Enhancing the capabilities of SoCs, enabling faster integration and reduced risk for customers. Contributing to the success of Synopsys by delivering high-quality IP on time. Leading a team of talented engineers, fostering innovation and excellence. Ensuring the highest standards of product quality and efficiency. Playing a key role in the Era of Smart Everything, from AI to IoT. What You ll Need: BTech/MTech degree in a relevant field. 8+ years of experience in analog design. Knowledge of CMOS processes and deep submicron process technologies. Proficiency in CMOS circuit design and layout methodology. Familiarity with analog mixed-signal simulation strategies. Understanding of JEDEC requirements for DDR interfaces and standards. Strong project management and leadership skills. Excellent written and verbal communication skills. Who You Are: A natural leader with the ability to inspire and guide a team. An excellent problem solver with a keen analytical mind. A collaborative team player who thrives in a cross-functional environment. A detail-oriented individual with a commitment to quality and efficiency. A proactive communicator who can convey complex technical information clearly.

* Collaborate with cross-function al teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuits. * Create and optimize layout designs using industry-stand ard EDA tools. * Perform physical verification and design rule checks to ensure design integrity and manufacturabil ity. * Participate in design reviews and provide feedback to improve design quality. * Work closely with circuit designers to understand design specifications and constraints. * Contribute to the development and enhancement of layout design methodologies and best practices. * Stay updated with the latest industry trends and advancements in A&MS layout design. The Impact You Will Have: * Ensure the delivery of high-quality layout designs for PVT Sensor IP development, integral to SOC subsystems. * Enhance the manufacturabil ity and reliability of our silicon lifecycle monitoring solutions. * Drive innovation in layout design methodologies and best practices. * Collaborate effectively with circuit designers to meet design specifications and constraints. * Contribute to the overall success of the rapidly expanding PVT IP group. * Support Synopsys leadership in the market for process, voltage, temperature, current, and droop sensors. What You ll Need: * Bachelor s or master s degree in electrical engineering or a related field. * 5+ years of experience in A&MS layout design for integrated circuits. * Proficiency in industry-stand ard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. * Exceptional knowledge of layout design methods, techniques, and methodologies. * Experience with physical verification tools, such as Calibre or Assura. * Understanding of semiconductor process technologies and their impact on layout design. * Excellent problem-solvin g and systematic skills. * Ability to work effectively in a team-oriented environment. * Good communication and interpersonal skills.

Review SerDes standards to develop analog sub-block specifications. Identify and refine circuit architectures to achieve optimal power, area, and performance targets. Propose design and verification strategies that efficiently use simulator features to ensure the highest quality design. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Present simulation data for peer and customer review. Document design features and test plans. Consult on the electrical characterization of your circuit within the SerDes IP product. Propose solutions for post-silicon design updates. The Impact You Will Have: Drive innovation in high-speed analog integrated circuit design. Ensure optimal performance, power efficiency, and area utilization of our products. Contribute to the development of industry-leading SerDes IP. Enhance the reliability and quality of our analog sub-blocks. Support the successful integration of SerDes IP into customer products. Foster collaboration and knowledge sharing within the R&D team. Influence design strategies and best practices within the organization. What You ll Need: BE with 8+ years of relevant experience or MTech with 6+ years of relevant experience in Electrical Engineering or Computer Engineering. In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals. Detailed design experience with at least one, and familiarity with several other SerDes sub-circuits. Awareness of ESD issues and circuit techniques for addressing them. Familiarity with custom digital design and high-speed logic paths. Knowledge of design for reliability, including EM, IR, and aging considerations. Experience with tools for schematic entry, physical layout, and design verification. Hands-on experience with physical layout of high-speed circuits is a plus. Proficiency with SPICE simulators and simulation methods. Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control / data-capture. Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB is desired. Who You Are: Collaborative and able to work effectively in a team environment. Detail-oriented with a strong focus on quality and reliability. Proactive problem-solver with innovative design strategies. Excellent communicator with strong documentation skills. Adaptable and able to thrive in a fast-paced, dynamic environment.

Design and develop analog/mixed-signal blocks for PCIe 6 and PCIe 7 PHY designs. Ensure designs meet PCIe protocol standards, optimizing for performance, power, and area targets. Support the porting of PHY designs to different technology nodes, maintaining signal integrity and performance. Collaborate with cross-functional teams to integrate analog circuits into larger SerDes PHY systems. Implement verification strategies for high-speed analog/mixed-signal circuits using advanced simulation tools. Work closely with physical layout teams to minimize parasitics, device stress, and process variation impacts. Analyze simulation and measurement data for design validation and compliance with PCIe standards. Provide technical guidance to junior engineers in analog/mixed-signal design methods. Document design features, specifications, and test plans for future reference. Work with the characterization team to validate the electrical performance of circuits in silicon. The Impact You Will Have: Drive the development of cutting-edge PCIe 6 and PCIe 7 PHY designs, pushing the boundaries of high-speed analog and mixed-signal circuits. Ensure that Synopsys designs meet the highest standards of performance, power efficiency, and area optimization. Enhance the reliability and integrity of our analog circuits as they are ported to new technology nodes. Foster innovation through collaboration with diverse teams, integrating leading-edge analog circuits into sophisticated SerDes PHY systems. Contribute to the verification and validation of high-speed circuits, ensuring compliance with stringent PCIe standards. Mentor and guide junior engineers, nurturing the next generation of top-tier analog designers. What You ll Need: PhD with 3+ years, or MTech/MS with 8+ years of experience in analog/mixed-signal circuit design, with experience in high-speed interfaces such as PCIe or SerDes PHY designs. Strong experience in transistor-level design of high-speed analog building blocks, such as LDOs, Bandgap references, ADC/DAC, PLLs, DLLs. Experience in high-speed SerDes AFE (Analog Front-End) development, including CTLE and CDR design. Experience designing high-speed SerDes transmitters, with knowledge of equalization techniques (e.g., DFE, FIR filters, TX pre-emphasis). Understanding of jitter budgeting analysis, including sources of jitter and strategies for minimizing its impact. Strong knowledge of CMOS technologies, including finFET and GAA processes. Good understanding of the PCIe protocol, signal integrity requirements, and high-speed clocking. Ability to provide input on layout design to minimize the effects of parasitics and process variations. Who You Are: Detail-oriented with a passion for innovation and excellence. Proactive and able to work independently with limited supervision. Strong communicator capable of effectively collaborating with cross-functional teams. Mentor and leader, eager to share knowledge and help develop junior engineers. Results-driven with a focus on delivering high-quality, reliable designs

Our Silicon IP business is all about integrating more capabilities into an SoC faster. We offer the world s broadest portfolio of silicon IP predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. Responsibilities: DDR I/O Circuit design Requirements- Qualification: BTech/MTech Skills/Experience: MTech+3years / BTech+5years Knowledge of CMOS processes and issues in deep submicron process technologies. CMOS circuit design and layout methodology & flow; basic understanding of analog/mixed signal circuitry, familiarity with basic ESD concepts is an advantage. Familiarity with ASIC design flow. Knowledge of JEDEC requirements for DDR interfaces & standards, DDR Timing, ODT and SDRAM functionality would be a plus. Ability to execute assigned circuit design tasks with best product quality and efficiency. Good written and verbal communication skills in interactions with internal development teams.

Designing and verifying complex Analog Mixed-Signal layouts, ensuring high-quality and reliable IPs. Collaborating with cross-functional teams to optimize layout designs for performance and manufacturability. Utilizing advanced tools and methodologies to mitigate deep submicron effects. Conducting floor-planning, routing, and top-level verification. Ensuring compliance with DRC, LVS, LPE standards and addressing ESD and latch-up considerations. Optimizing power routes and addressing EM and IR considerations for robust designs. The Impact You Will Have: Enhancing the performance and reliability of our high-speed SerDes IPs and other critical components. Driving innovation in Analog Mixed-Signal layout design, contributing to cutting-edge technology developments. Ensuring seamless integration and functionality of our IPs in diverse applications. Improving design efficiency and manufacturability through advanced layout techniques. Contributing to the success of our product development lifecycle by delivering high-quality designs. Supporting our mission to lead in chip design and IP integration, shaping the future of technology. What You ll Need: 6+ years of experience in Analog Mixed-Signal layout and verification. Advanced understanding of deep submicron effects and mitigation techniques. Proficiency in using advanced layout design tools and methodologies. Solid understanding of CMOS and FinFET layouts and process technology in 28nm and below. Familiarity with layout design flow, including top-level verification flow, DRC/LVS, LPE.

Reviewing SerDes standards to develop analog sub-block specifications. Identifying and refining circuit architectures to achieve optimal power, area, and performance targets. Proposing design and verification strategies that efficiently use simulator features to ensure the highest quality design. Overseeing physical layout to minimize the effects of parasitics, device stress, and process variation. Presenting simulation data for peer and customer review. Documenting design features and test plans. Consulting on the electrical characterization of your circuit within the SerDes IP product and proposing solutions for post-silicon design updates. The Impact You Will Have: Contributing to the development of high-performance SerDes IP that meets industry standards. Optimizing power, area, and performance of analog circuits, driving efficiency and innovation. Ensuring high-quality designs through meticulous verification strategies and simulator features. Improving the reliability and robustness of integrated circuits through careful layout oversight. Enhancing customer satisfaction by presenting comprehensive simulation data and supporting design reviews. Facilitating post-silicon design updates with your expertise in electrical characterization. What You ll Need: BE+6 years of relevant experience or MTech+4 years of relevant experience in Electrical Engineering, Computer Engineering, or a related field. In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals. Detailed design experience with at least one SerDes sub-circuit and familiarity with several others (e.g., receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers, VCO, phase mixer, DLL, PLL, bandgap reference, ADC, DAC). Aware of ESD issues and circuit techniques. Familiarity with custom digital design and high-speed logic paths. Knowledge of design for reliability (EM, IR, aging, etc.). Experience with tools for schematic entry, physical layout, and design verification. Hands-on experience with physical layout of high-speed circuits is a plus. Knowledge of SPICE simulators and simulation methods. Proficiency in Verilog-A for analog behavioral modeling and simulation-control / data-capture. Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB. Who You Are: A highly analytical thinker with a strong attention to detail. A collaborative team player who thrives in a diverse work environment. Excellent communicator with strong documentation skills. A proactive problem-solver who can identify and implement solutions effectively. Adaptable and open to learning new technologies and approaches

You are a highly skilled and experienced Analog Design Engineer with a passion for developing cutting-edge technology. With a strong foundation in Electrical or Computer Engineering, you have honed your expertise in transistor-level circuit design and are adept at working with high-speed analog integrated circuits. Your deep understanding of CMOS design fundamentals and familiarity with various SerDes sub-circuits make you an invaluable asset to any team. You thrive in collaborative environments, working seamlessly with cross-functional teams of analog and digital designers. Your meticulous approach ensures optimal power, area, and performance targets are met, and your innovative design strategies push the boundaries of what is possible. You are not only technically proficient but also possess excellent communication and documentation skills, allowing you to effectively share your ideas and results with peers and customers. Your proactive attitude and problem-solving abilities make you a go-to person for post-silicon design updates and electrical characterization. In summary, you are a seasoned professional ready to take on the challenges of high-speed analog integrated circuit design in the latest FinFET process nodes. What You ll Be Doing: Review SerDes standards to develop analog sub-block specifications. Identify and refine circuit architectures to achieve optimal power, area, and performance targets. Propose design and verification strategies that efficiently use simulator features to ensure the highest quality design. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Present simulation data for peer and customer review. Document design features and test plans. Consult on the electrical characterization of your circuit within the SerDes IP product. Propose solutions for post-silicon design updates. The Impact You Will Have: Drive innovation in high-speed analog integrated circuit design. Ensure optimal performance, power efficiency, and area utilization of our products. Contribute to the development of industry-leading SerDes IP. Enhance the reliability and quality of our analog sub-blocks. Support the successful integration of SerDes IP into customer products. Foster collaboration and knowledge sharing within the R&D team. Influence design strategies and best practices within the organization. What You ll Need: BE with 5+ years of relevant experience or MTech with 4+ years of relevant experience in Electrical Engineering or Computer Engineering. In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals. Detailed design experience with at least one, and familiarity with several other SerDes sub-circuits. Awareness of ESD issues and circuit techniques for addressing them. Familiarity with custom digital design and high-speed logic paths. Knowledge of design for reliability, including EM, IR, and aging considerations. Experience with tools for schematic entry, physical layout, and design verification. Hands-on experience with physical layout of high-speed circuits is a plus. Proficiency with SPICE simulators and simulation methods. Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control / data-capture. Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB is desired. Who You Are: Collaborative and able to work effectively in a team environment. Detail-oriented with a strong focus on quality and reliability. Proactive problem-solver with innovative design strategies. Excellent communicator with strong documentation skills. Adaptable and able to thrive in a fast-paced, dynamic environment.

Review SerDes standards to develop novel transceiver architectures and sub-block specifications. Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area and performance targets. Work across project and department teams to streamline design and verification strategies ensure overall design quality, efficiency and performance. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Present & review simulation data from internal project teams. Present results externally at industry panels or at customer reviews. Document design features and test plans. Consult on the overall electrical characterization of the SerDes IP product. Analyze customer silicon data for design enhancements. Propose solutions for post-silicon design updates. Job Requirements MTech/MS with 12+ years, Btech/BS with 14+ years of practical analog IC design experience; degree in Electrical Engineering or Computer Engineering or other relevant field of study Experience with FinFET technologies In depth familiarity with transistor level circuit design - sound CMOS design fundamentals, experience with CMOS tape-outs Good understanding of Multi Gbps range High speed designs including PAM4 SerDes Architectures Extensive design experience with at least one, and familiarity with several other SerDes sub-circuits (ie. TX, RX ,adaptive Equalizers-(FIR, DFE, CTLE), PLL, DLL, BGR, Regulators, Injection locked oscillators, ADC, DAC etc) Experience with analog/digital interactions for optimizing circuit performance (calibration, adaptation, timing-handoff, etc) Aware of ESD issues (ie. circuit techniques, layout) Familiarity with custom digital design (ie. high speed logic paths) Knowledge of design for reliability (ie. EM, IR, aging, self heating etc ) Knowledge of layout effects (ie. matching, reliability, proximity effects, etc ) Experience with tools for schematic entry, physical layout, and design verification Knowledge of SPICE simulators and simulation methods Exposure to scripting for post processing of simulation results (ie. TCL, PERL, MATLAB etc ) Some knowledge of system level budgeting (ie. jitter, amplitude, noise, etc ) Aware of signal integrity issues (ie. effects of packaging, board parasitics, crosstalk, noise) Good communication and documentation skills

We are seeking an experienced analog design manager to lead our high-performance SERDES IP design team. This senior role will oversee all aspects of analog IP development and execution for cutting-edge SerDes architectures targeting advanced process nodes. Responsibilities: - Manage and mentor a team of 8-10 senior analog designers focused on high-speed SerDes IP development across multiple projects - Define architecture specifications and circuit implementation requirements for next-generation SerDes PHY IPs - Ensure adherence to project schedules, quality metrics, power/area targets through effective team oversight - Collaborate with cross-functional teams (digital design, physical design, CAD) to integrate analog IP components - Partner with process engineering teams to enable robust analog IP across advanced FinFET nodes - Continuously drive design methodology improvements and adoption of latest EDA tools/flows - Develop and manage operational plan, including staffing, budgets and resource allocation - Hire, develop and retain top analog engineering talent through active mentorship Requirements: - Bachelors degree in electrical engineering; advanced degree preferred -8+ years of experience in analog/mixed-signal IC design with a strong background in SerDes architectures - 2+ years of people management experience leading high-performance analog design teams - Proven expertise in high-speed I/O design, architectures, circuits, and layout implementation - Extensive knowledge of CDR, DFE, CTLE, EQ, decision feedback equalizer design techniques - Hands-on experience with analog/mixed-signal design flows, tools (Cadence, Synopsys), modeling - Understanding of FinFET transistor characteristics and design challenges at advanced nodes - Strong project management skills with the ability to manage multiple priorities - Excellent communication and people leadership abilities to motivate cross-functional teams