15.0 - 17.0 years

0 Lacs

noida, uttar pradesh, india

On-site

MPU Engineering team defines and develops System on Chip, ASIC's, Digital and Analog IP's for a wide range of products, including automotive microprocessors, application processors, microcontrollers, and network processor. Responsibilities:- Lead product execution for Automotive/Consumer/Industrial ASIL-B/D SoC's Work with architects and systems engineering to define the part. Generate and analyze data to take right and cost-effective architecture decision. Work with IP, Technology, packaging partners to assess the right IP/packages and technology options for the part. Work with IP and SoC functions (front end, verification, AMS, DFT, Physical implementation) to understand and resolve inter/...

Posted 2 weeks ago

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Lead Design Engineer Cadence

5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

As a member of the Cadence team, you will have the opportunity to contribute to the world of technology by utilizing your skills and expertise. You will be responsible for hands-on layout experience in various analog IP components such as Opamps, Bandgaps, Data converters, LDO, PLL, and more. Your role will involve understanding the impact of layout on the circuit regarding speed, capacitance, power, and area. Knowledge of analog layout techniques like matching, shielding, and familiarity with DSM technology methodology will be essential. Experience with the latest technology nodes, specifically 28nm and below, is preferred. Additionally, you will be expected to possess good communication sk...

Posted 4 months ago

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Analog Circuit Design Lead Wipro

7.0 - 10.0 years

20 - 35 Lacs

Bengaluru

Hybrid

Requirement : Analog Circuit Design Lead Experience Range : 7 - 12 Yrs. Work Location(s) : Bengaluru, Karnataka Candidates who are ready to join Immediately Requirements: Experience in entire Analog IP development including circuit design, layout, AMS verification, and characterization. Must have led the entire Analog IP development cycle and team. Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs, Oscillators, General Purpose IOs, Temperature sensor, SERDES, PHYs, Die to Die interconnect, High-speed IOs, etc. Analog/custom layout design in advanced CMOS process. Ability to understand design constraints and implement high-quality...

Posted 6 months ago

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