116 Analog Design Jobs - Page 2

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Overview In this highly cross functional role, you will be part of the Global Design Enablement team responsible for various aspects of PDK development across Custom, Analog and RF technology nodes. As a member of the CAD team, you will be working closely with Custom, Analog & RF Engineering design community to develop & support customized tools and flows for Schematic & Layout design, Circuit Simulation, IP characterization, Custom/Analog P&R and transistor-level EM/IR flows. You will also have the responsibility to collaborate with our Foundry and EDA partners to deploy best-in class EDA tools and flows in addition to developing in-house productivity & QoR automation solutions for improving overall design methodology. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications Bachelors or Masters in Electrical Engineering, Computer Science, or related field. 2+ years of industry experience in CAD or PDK development Knowledge of Virtuoso suite of tools- Schematic, Layout, Analog Design Environment etc. Proficiency in one or more of the programming/scripting languages- , Python, Perl and TCL. Good understanding of CMOS fundamentals and Circuit Design Concepts Strong aptitude for programming and automation Good communication skills and ability to work collaboratively in a team environment Preferred Qualifications Familiarity with SPICE simulation tools (Hspice, SpectreX/APS, AFS/Solido SPICE , PrimeSim SPICE, ADS, GoldenGate etc.) Experience with Electromagnetic tools, like Peakview and EMX, is a plus. Knowledge of FinFet & SOI processes is a plus Educational Requirements RequiredBachelor's, Electrical Engineering Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Work Profile : - Work on development of custom Analog circuit boards for applications related to RF, interfaces etc. - Implement new features and bug fixes - Verify analog/mixed-signal integrated circuits - Develop test cases to verify new features and bug fixes - Review and update the user manuals for software tools. - Supporting digital modelling of analog circuits for mixed-signal verification - Creating design specifications and circuit schematics - Work both independently and in a team environment, with the opportunity to provide technical leadership to other members of the engineering team - Create and/or modify specification documents detailing system design and enhancements to meet marketing requirements - Collaborate with others in the creation of technical reports, whitepapers, and user documentation Requisites : - EE/EEE/ECE graduate, undergraduate degree from reputed Tier 1 or Tier 2 colleges . - Strong knowledge of analog integrated circuit design fundamentals - Proven experience taking designs from concept to production - Experience in analog/mixed-signal IC design & verification - Understanding of BJT, CMOS and Op-Amp technologies. - Good understanding of analog/mixed-signal design flows (Cadence, Synopsys) - Transistor and system level simulation skills - Discrete time and continuous time signal processing skills - Strong lab and silicon validation skills - Verilog based digital design and test bench development, is a plus - Strong communication skills, both written and verbal

Alternate Job Titles: Senior Staff Analog Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a passionate and experienced Analog Design Engineer with a strong background in full custom analog/mixed-signal circuit design You thrive in a collaborative environment and are always looking for innovative solutions to complex problems You have a proven track record of working on the design, implementation, and verification of advanced analog circuits and systems Your technical expertise is complemented by excellent teamwork, communication, and mentoring skills, making you an effective leader and collaborator within multidisciplinary teams, With over 10 years of relevant industry experience, or a PhD with equivalent experience, you possess a deep understanding of custom Analog/AMS design techniques, implementation, and verification You are well-versed in the challenges of advanced processes, including ESD and reliability, and have hands-on experience with circuit design and simulation tools from various EDA vendors Your familiarity with statistical design methodologies and post-layout extraction and simulation ensures that your designs are robust and reliable, What Youll Be Doing: Conceptualizing and designing state-of-the-art analog sensors for on-chip Process, Voltage, Temperature, Current, and Droop monitoring, Collaborating with the layout team to achieve optimal engineering solutions, Deploying new sensors into test chips and conducting post-silicon characterization, Guiding and mentoring junior engineers, tracking their work, and ensuring project milestones are met, Developing new solutions in the field of on-die monitoring, Participating in the architecture, design, and verification of various mixed-signal blocks such as PVT sensors, oscillators, bandgaps, PLLs, LDOs, ADCs, amplifiers, and PHYs, The Impact You Will Have: Contributing to the development of cutting-edge technology that powers the Era of Smart Everything, Ensuring the reliability and performance of advanced analog and mixed-signal circuits, Driving innovation in on-chip monitoring solutions, enhancing the functionality and efficiency of our products, Mentoring and developing the next generation of engineers, fostering a culture of excellence and continuous improvement, Collaborating with cross-functional teams to deliver high-quality products that meet customer needs, Enhancing Synopsys' reputation as a leader in chip design and verification through your technical contributions and thought leadership, What Youll Need: Tech Strong technical experience in full custom analog/mixed-signal circuit design, circuit simulations, custom layout, and post-silicon characterization, Sound knowledge of custom Analog/AMS design techniques, implementation, and verification, Hands-on experience with circuit design and simulation tools, IC design CAD packages from any EDA vendor, Strong understanding of SPICE simulator concepts and simulation methods, Who You Are: An innovative thinker with a design-oriented and forward-looking mindset, A capable leader who can manage projects independently and guide junior engineers, A team player with excellent communication, mentoring, and interpersonal skills, Detail-oriented with a strong focus on quality and reliability, Passionate about technology and continuously seeking to learn and improve, The Team Youll Be A Part Of: You will be part of the PVT sensor group, a team dedicated to developing cutting-edge on-chip monitoring solutions Our team is composed of highly skilled engineers who collaborate closely to push the boundaries of technology and deliver innovative products We value creativity, teamwork, and a commitment to excellence, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: An experienced and passionate Analog Design Engineer with 1-3 years of experience in the field You have a strong background in CMOS processes and deep submicron process technologies You understand the intricacies of CMOS circuit design and layout methodology, and you have a basic understanding of analog/mixed signal circuitry Familiarity with ESD concepts is a plus You are knowledgeable about ASIC design flow and JEDEC requirements for DDR interfaces and standards You excel at executing circuit design tasks with a focus on quality and efficiency Your communication skills are excellent, enabling you to interact effectively with internal development teams, What Youll Be Doing: Designing DDR/HBM Memory Interface I/O circuits and layouts, including GPIO and special I/Os, Collaborating with the DDR/HBM PHY team, package engineers, and system engineers to meet design specifications, Ensuring adherence to best practices in circuit design and layout methodology, Conducting thorough design reviews and contributing to the continuous improvement of design processes, Staying updated with the latest advancements in analog design technologies and methodologies, Documenting design processes and providing support for design validation and testing, The Impact You Will Have: Enhancing the performance and reliability of our analog and mixed-signal circuits, Contributing to the development of high-performance DDR/HBM Memory Interfaces, Supporting the overall success of our chip design and IP integration projects, Driving innovation in analog design methodologies and processes, Ensuring our products meet the highest standards of quality and efficiency, Helping Synopsys maintain its leadership position in the semiconductor industry, What Youll Need: Bachelor's or Master's degree in Electronics or Electrical Engineering, 1-3 years of experience in CMOS processes and deep submicron technologies, Proficiency in CMOS circuit design and layout methodology, Basic understanding of analog/mixed signal circuitry, Familiarity with ASIC design flow and JEDEC requirements for DDR interfaces, Who You Are: A detail-oriented engineer with a passion for analog design, An effective communicator who collaborates well with cross-functional teams, A problem-solver who can analyze and address design challenges efficiently, A continuous learner who stays updated with industry trends and advancements, A team player who contributes to the overall success of the project, The Team Youll Be A Part Of: You'll join a dynamic and innovative team of engineers focused on advancing our analog design capabilities Our team is dedicated to pushing the boundaries of technology and delivering cutting-edge solutions for the semiconductor industry We value collaboration, creativity, and a commitment to excellence in everything we do, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

Analog Design Engineer Skills & Experience Required: 5+ years of relevant experience. Has relevant knowledge and hands on experience of SerDes design at high data rates, up to 20Gbps. Study the assigned block, analyze the circuit carefully, and work on the hand analysis. Understand the required performance, the targeted specs and trade-off between different performance metrices. Write behavioral model of the circuit blocks for system-level simulations. Simulate and verifying designed schematics using Synopsys tools using circuit simulators. Debug to find out the root cause for any performance degradation. Being capable of solving all the faced issues. Working with layout team on layout optimization. Evaluate post layout performance using extraction tools (ICV and Calibre). Understand the interface with other blocks (if any) and work with other team members to optimize the interface. Coordinate and handling top-level simulations. Develop and executing characterization plans of the designed blocks, systems, and chips. Check the design reliability (EM/IR/Aging) using available tools. Do timing models using custom static timing analysis tools. Deliver the corresponding documentation as per the design process. Excellent knowledge of design/simulation tools such as Synopsys, Cadence and/or Mentor tools or any relevant tool. Good knowledge of any EM simulation tool. Good knowledge in behavioral modeling (Verilog, Verilog AMS). Very Good knowledge of custom timing static analysis tool (Synopsys NanoTime and SiliconSmart). Job Location IndiaBangalore IndiaChennai IndiaHyderabad IndiaKolkata IndiaNoida S. KoreaSeoul Location - Bengaluru,Chennai,Kolkata,Noida

Hiring electronics designer for Lighting company. Who is good in to electronics designing /PCB/ program manager etc. Pls share CV on sarika.vasdev@provisionconsulting.in

Required Experience: Masters degree in Electronic and Electrical Engineering At least 5 years of relevant industry experience Strong background in both Digital and Analog Circuit Design, as well as Digital Communication Systems Proven experience in hardware design for consumer electronics products Proficient in using modern schematic capture tools, PCB layout software, and design simulation tools Solid understanding of computer hardware architecture and networking concepts Experience in developing and executing test scripts, including test automation practices Familiarity with chipsets used in TV, broadcast, and streaming applications Experience with Design for Cost (DfC) and Design for Manufacturing (DfM) principles Skilled in using standard analog and digital measurement instruments Hands-on experience with FPGA and microcontroller programming, including debugging Demonstrated expertise in system bring-up, debugging, validation, testing, and performance optimization Working knowledge of EMC compliance and RF testing procedures

The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique One Cadence - One Team culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other every day. Job Summary As a product Validation engineer you will be part of Cadence Virtuoso Product validation team and will be contributing to the Development & executing test plans for Virtuoso features. You will be working closely with the Virtuoso Product Engineering and Development teams. Knowledge of analog design flow and analog design/verification tools will be beneficial. Job Responsibilities As a Lead Product Validation (PV) engineer, you will be responsible for quality engineering for Cadence Virtuoso product line including: Working with Product engineering (PE) and development teams to understand customer requirements Developing & executing test plans based on the requirements Execute on test plans and perform unit, integration, solutions level validation Ensure product quality by providing inputs to improve functionality, , usability, reliability, performance and stability. Maintaining regression tests for regular test cycles and reporting failures in bug tracking system Working with PE and Field teams to integrate customer test cases as part of regression suite Experience and Technical Skills required 4+ to 8 years of experience in the EDA or VLSI industry Good understanding of analog design flow and design tools Knowledge of designs in advanced technology nodes is desirable. . Familiarity with Shell & PERL scripting, SKILL know-how will be a big plus Strong problem-solving skills and Effective communication & interpersonal skills Team player with capability/drive to work in a multi geo cross-functional environment Qualifications BE/BTech/ME/MS/MTech in Electrical/Electronics or equivalent Behavioral skills required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore what s possible to get the job done, including creative use of unconventional solutions Work effectively across functions and geographies Push to raise the bar while always operating with integrity

As a Power Electronics Engineer, you will be responsible for designing, developing, and testing power electronic systems and components used in railway applications. You will work closely with cross-functional teams to deliver innovative solutions that meet the demanding requirements of the railway industry. Your role will involve both theoretical analysis and practical implementation, with a focus on reliability, efficiency, and safety. Key Responsibilities: Design and simulate circuits & topologies using design tools such as MATLAB, PSPICE, and ANSYS. Essential to have hands on experience in three phase circuit topologies e.g. Inverters, rectifiers and power supply circuits, DC-DC Converters e.g. buck, fly back. Select & Carry out device characterization of power modules (Si IGBT/MOSFET/SiC/Diode). Estimate power losses and predict thermal stress for various semiconductors using internal design tools or multi-physics simulation tools. Design magnetic (Transformers, Inductors) for various power converter topologies using tools like MATHCAD & PSPICE and realize design samples through vendor interactions. Design, simulate & realize analog/digital circuit (Operational amplifiers, logic gates etc.) perform various types of analyses and select appropriate components considering thermal & safety aspects. Guide team on carrying out EMC Tests as per relevant standards, debug and resolve EMI/EMC issues. Support design verification & product validation test activities as per applicable IEC/UL Standards. Review & provide guidance to the younger team members in design, prototyping, realizing and testing of the product. Work with a multi-disciplinary development team comprising of mechanical, embedded electronics, supply chain and product owners to deliver products. Lead activities like DFMEA and adhere Danfoss processes for product development. Work closely with supply chain to create test instruction for PCBAs & Units for production process control. Work with manufacturing & global suppliers to test & qualify components and assemblies during prototype development and resolve issues as needed. Qualifications: Bachelors or Masters degree in Electrical Engineering, Power Electronics, or a related field. Minimum of 10 years of experience in power electronics design and development, preferably in the railway or transportation sector. Hands-on experience with power converters, inverters, and motor drives. Skills: Proficiency in simulation tools (e.g., MATLAB/Simulink, PSpice, MATHCAD). Strong understanding of electromagnetic compatibility (EMC) and thermal management. Knowledge of railway standards and regulations is a plus. Excellent problem-solving skills and attention to detail. Strong communication skills and ability to work effectively in a team environment.

Skillset needed - High voltage Flyback Power Supply Design Analog & Digital Electronics Design (Micro controller / Microprocessor based Design) Communication Design: RS485, ETHERNET Design for EMI EMC expertise along with Experience in Simulation Tools as well RF communication Design, High speed digital design Expertise on Signal integrity Analysis Expertise on all IEC/UL Certification Compliance standards (Safety, EMC & Measurement Standard)

"> Search Jobs Find Jobs For Where Search Jobs R&D Engineering, Sr Staff Engineer (VIP verification) Bengaluru, Karnataka, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 8839 Date posted 02/24/2025 Share this job Email LinkedIn X Facebook Experience : 7yrs to 12 years Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective. Locally should be to be "go-to" person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

RF, Analog & Mixed Signal level designs for various applications using CMOS, BiCMOS and GaAs processes on industry standard EDA tools.Must be an efficient user of Cadence (Virtuoso)/Agilent ADS tools. Good knowledge of IC design,simulations & Layout

"> Search Jobs Find Jobs For Where Search Jobs R&D Engineering, Staff Engineer - IP Verification Noida, Uttar Pradesh, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 7271 Date posted 02/24/2025 Share this job Email LinkedIn X Facebook Experience : 5yrs to 10 years Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective Locally should be to be "go-to" person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

"> Search Jobs Find Jobs For Where Search Jobs R&D Engineering, Staff Engineer (VIP verification) Noida, Uttar Pradesh, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 8828 Date posted 02/24/2025 Share this job Email LinkedIn X Facebook Experience : 5yrs to 12 years Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective. Locally should be to be "go-to" person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

Designing and optimizing standard cell libraries to achieve targeted PPA. Developing complex circuits including flip-flops, clock gating cells, level shifters, and power gating cells. Collaborating with layout designers to optimize layout parasitics. Engaging in layout extraction and understanding layout-dependent parameters. Conducting timing and power characterization of standard cells. Working closely with cross-functional teams for optimization across the design chain. The Impact You Will Have: Enhancing the performance, power, and area of standard cell libraries. Contributing to the development of high-impact, cutting-edge technology. Driving innovation in complex circuit design and optimization. Ensuring the successful integration of IP blocks into SoCs. Influencing the design and development of self-driving cars, AI, and IoT devices. Supporting Synopsys leadership in the silicon IP market. What You ll Need: Bachelors or Masters degree in Electrical Engineering or related field. 3+ years of experience in standard cell library design. Expertise in CMOS device characteristics and submicron process nodes. Proficiency in designing complex circuits and running high sigma variation analysis. Experience in layout design and optimization. Who You Are: Strong analytical and logical thinker. Detail-oriented with excellent problem-solving skills. Effective communicator and collaborator. Innovative and passionate about technology. Adaptable and able to work in a dynamic, fast-paced environment

This position is in a cutting-edge synthesis product, in the area of Logic synthesis and Optimization. The candidate will be required to work on enhancing the optimization flow for performance, power, area (PPA) or runtime. This will involve identifying the opportunity for improving PPA, proposing a good solution/algorithm, implementing it, thoroughly testing it, and supporting it post-deployment. Job Requirements 1. At least 5 years of work experience in EDA, preferably in logic optimization and logic synthesis. 2. Strong software skills: minimum 5 years of coding experience in C++. 3. Proficiency in data structures and algorithms. 4. Strong analytical and problem-solving skills. 5. Good understanding of chip design flow. 6. Must be a team player, clear in written and oral communication skills and open to work with diverse teams across multiple time zones. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

The candidate would be part of the VIP group responsible for development of Verification IPs. Core responsibilities would include Designing and developing the VIP/Test-bench, Creating Verification plans, Coding sequences/Test-scenarios, Coverage driven verification. The responsibility would also include enhancement of the existing Verification IP products and interface with customers during VIP deployment. This is an opportunity to work with best-in-class verification, debug tools, Design IP & close collaboration with best protocol experts in the industry. You will work with highly professional and motivated colleagues who value and support your contribution. Requirements: Bachelors/masters with good academic record. 7+ years experience in developing HVL based verification environments, preferably using System Verilog. Exposure to coverage driven verification. Experience in verification methodologies like UVM/OVM. Exposure to complex SV test benches involving multiple protocols and VIPs. Experience in VIP development is highly desirable. Should have a strong work exposure on any of the industry standard protocols like PCIe, USB, Ethernet, MIPI etc.. Demonstrates good analysis and problem-solving skills. Have a strong passion for work and driving things to closure.

Owning the complete physical implementation process at both block and chip levels. Delivering timing clean blocks and chip-level designs that meet design targets. Ensuring DRC, LVS, and IR closure for all designs. Setting up and evaluating all aspects of the physical design flow, including place and route, timing, PV, and IR. Collaborating closely with the frontend design team to resolve design issues. Executing project responsibilities from start to completion, contributing to moderately complex aspects of the project. The Impact You Will Have: Ensuring the delivery of high-quality, timing-clean designs that meet industry standards. Driving innovation in physical design methodologies and processes. Contributing to the development of cutting-edge technologies that shape the future. Enhancing the overall efficiency and effectiveness of the design team. Providing mentorship and guidance to junior engineers, fostering a culture of continuous learning and improvement. Strengthening Synopsys position as a leader in the semiconductor industry through your expertise and contributions. What You ll Need: MSEE/BSEE with 6+ years of related experience in ASIC physical design. In-depth understanding of physical design specialization, with working knowledge of one other related area. Strong problem-solving skills and creativity in resolving design issues. Experience in scripting using Tcl and Perl. Ability to execute project responsibilities independently and contribute to team-driven projects. Who You Are: Detail-oriented and committed to delivering high-quality work. Collaborative and able to work effectively in a team environment. Proactive and able to take ownership of tasks and projects. Excellent communicator, capable of networking with senior personnel. Mentor and guide to junior peers, sharing knowledge and expertise.

Design and develop analog/mixed-signal blocks for PCIe 6 and PCIe 7 PHY designs. Ensure designs meet PCIe protocol standards, optimizing for performance, power, and area targets. Support the porting of PHY designs to different technology nodes, maintaining signal integrity and performance. Collaborate with cross-functional teams to integrate analog circuits into larger SerDes PHY systems. Implement verification strategies for high-speed analog/mixed-signal circuits using advanced simulation tools. Work closely with physical layout teams to minimize parasitics, device stress, and process variation impacts. Analyze simulation and measurement data for design validation and compliance with PCIe standards. Provide technical guidance to junior engineers in analog/mixed-signal design methods. Document design features, specifications, and test plans for future reference. Work with the characterization team to validate the electrical performance of circuits in silicon. The Impact You Will Have: Drive the development of cutting-edge PCIe 6 and PCIe 7 PHY designs, pushing the boundaries of high-speed analog and mixed-signal circuits. Ensure that Synopsys designs meet the highest standards of performance, power efficiency, and area optimization. Enhance the reliability and integrity of our analog circuits as they are ported to new technology nodes. Foster innovation through collaboration with diverse teams, integrating leading-edge analog circuits into sophisticated SerDes PHY systems. Contribute to the verification and validation of high-speed circuits, ensuring compliance with stringent PCIe standards. Mentor and guide junior engineers, nurturing the next generation of top-tier analog designers. What You ll Need: PhD with 3+ years, or MTech/MS with 8+ years of experience in analog/mixed-signal circuit design, with experience in high-speed interfaces such as PCIe or SerDes PHY designs. Strong experience in transistor-level design of high-speed analog building blocks, such as LDOs, Bandgap references, ADC/DAC, PLLs, DLLs. Experience in high-speed SerDes AFE (Analog Front-End) development, including CTLE and CDR design. Experience designing high-speed SerDes transmitters, with knowledge of equalization techniques (e.g., DFE, FIR filters, TX pre-emphasis). Understanding of jitter budgeting analysis, including sources of jitter and strategies for minimizing its impact. Strong knowledge of CMOS technologies, including finFET and GAA processes. Good understanding of the PCIe protocol, signal integrity requirements, and high-speed clocking. Ability to provide input on layout design to minimize the effects of parasitics and process variations. Who You Are: Detail-oriented with a passion for innovation and excellence. Proactive and able to work independently with limited supervision. Strong communicator capable of effectively collaborating with cross-functional teams. Mentor and leader, eager to share knowledge and help develop junior engineers. Results-driven with a focus on delivering high-quality, reliable designs

Developing next-generation high-speed memory interface PHY IPs (DDR/HBM/UCIe) Executing projects in advanced technologies with a focus on analytical and problem-solving skills Designing high-speed IOs for memory interface PHY IP in CMOS/FinFET/GAA Collaborating with cross-functional teams globally to achieve project goals Ensuring product quality and efficiency in all design tasks Staying updated with the latest industry standards and technological advancements The Impact You Will Have: Driving the development of innovative high-speed memory interface PHY IPs Contributing to the integration of advanced capabilities in SoCs Enhancing the performance, power efficiency, and size optimization of target applications Reducing risk and accelerating time-to-market for differentiated products Collaborating with global teams to deliver high-quality products Setting industry benchmarks for advanced analog design technologies What You ll Need: BTech/MTech degree in a relevant field 3+ years of experience in analog design fundamentals and device physics Proficiency in high-speed IO designs in advanced technologies Experience with ESD and reliability concepts Knowledge of JEDEC requirements for memory interfaces and standards Familiarity with signal integrity and/or power integrity is a plus Who You Are: An analytical thinker with strong problem-solving skills A collaborative team player with excellent communication and interpersonal skills Detail-oriented and capable of executing tasks with high precision and efficiency Adaptable and eager to learn new technologies and industry standards Passionate about innovation and technological advancement

"> Search Jobs Find Jobs For * Designing and developing DDR I/O circuits to meet performance and power specifications. * Collaborating with cross-functional teams to integrate analog circuitry into SoCs. * Executing circuit design tasks with a focus on product quality and efficiency. * Conducting layout reviews and ensuring adherence to design methodologies. * Participating in design reviews and providing technical insights. * Staying updated with the latest advancements in CMOS processes and deep submicron technologies. The Impact You Will Have: * Enhancing the performance and efficiency of our silicon IP portfolio. * Contributing to the rapid integration of advanced capabilities into SoCs. * Reducing the time-to-market and risk for our customers products. * Driving innovation in analog design and setting new industry standards. * Strengthening Synopsys position as a leader in chip design and verification. * Empowering the development of high-performance, differentiated products. What You ll Need: * BTech/MTech in Electrical Engineering or a related field. * 4+ years of experience in CMOS circuit design and layout methodology. * Strong knowledge of deep submicron process technologies. * Familiarity with ASIC design flow and JEDEC standards for DDR interfaces. * Excellent written and verbal communication skills. Who You Are: * A collaborative team player with a proactive approach. * Detail-oriented with a commitment to quality and efficiency. * Innovative and adaptable, always seeking to learn and grow. * Effective communicator, able to convey technical information clearly. * Problem-solver with strong analytical skills.

We are looking for a seasoned and enthusiastic professional who thrives on problem-solving, is committed to ongoing learning, and is eager to work with advanced technologies. You possess outstanding communication skills and enjoy working in a dynamic team of highly talented engineers. As the Manager- Analog Design, you have a deep understanding of deep understanding of high-speed circuit design. You are experienced in leading teams, designing and analyzing analog circuits, combined with your knowledge of network/transmission line/SI analysis and semiconductor devices/physics, makes you a valuable asset. managing regression analysis and collaborating closely with design, layout and other stakeholders. You have experience in modeling complex/non-linear circuit behavior to linear models for stability and jitter analysis. Your ability to micro-architect circuits from specifications and focus on enhancing PPA targets and reducing turnaround time sets you apart. You possess a strong grip on design reliability analysis and can work effectively both independently and lead the team. Your excellent communication skills and collaborative nature enable you to work seamlessly with cross-functional teams to achieve project goals. You are dedicated to staying updated with the latest advancements in analog design and are eager to contribute to innovative solutions that shape the future of technology. What You ll Be Doing: * Collaborate with design, Layout, ESD teams to align requirements and resolve bottlenecks effectively. * Innovate and refine design methodologies to enhance scalability, efficiency, and reliability. * Design, develop, and verify high-speed analog and mixed-signal integrated circuits. * Collaborate with cross-functional teams to define design specifications and requirements. * Model complex/non-linear circuit behavior to linear models for stability and jitter analysis. * Perform circuit simulations and layout verification to ensure design accuracy and performance. * Optimize designs for power, performance, and area (PPA) and reduce turnaround time. * Contribute to the development of design methodologies and best practices. The Impact You Will Have: * Advance the design and verification of high-speed analog and mixed-signal integrated circuits. * Ensure the accuracy and reliability of analog designs through rigorous verification and testing. * Collaborate with cross-functional teams to deliver innovative solutions that meet market demands. * Contribute to the continuous improvement of design methodologies and processes. * Support the development of cutting-edge technologies that enhance our products and services. * Drive innovation and excellence in analog design at Synopsys. What You ll Need: * Bachelor s degree in electrical engineering, Computer Engineering, or a related field. * 10+ years of experience in analog circuit design and analysis. * Deep understanding of analog circuits design and analysis techniques. * Experience in modeling complex/non-linear circuit behavior to linear models for stability and jitter analysis. * Good understanding of network/transmission line/SI analysis and semiconductor devices/physics. * Strong grip on design reliability analysis. * Ability to micro-architect circuits from specifications. * Focus on enhancing PPA targets and reducing turnaround time. Who You Are: * A strong leader with excellent communication and mentoring skills. * Innovative and committed to continuous improvement. * Detail-oriented with a strategic mindset. * Collaborative, with the ability to work effectively in a team environment. * Passionate about technology and eager to work on cutting-edge projects

Design, develop, and verify high-speed analog and mixed-signal integrated circuits. Collaborate with cross-functional teams to define design specifications and requirements. Model complex/non-linear circuit behavior to linear models for stability and jitter analysis. Perform circuit simulations and layout verification to ensure design accuracy and performance. Optimize designs for power, performance, and area (PPA) and reduce turnaround time. Contribute to the development of design methodologies and best practices. The Impact You Will Have: Advance the design and verification of high-speed analog and mixed-signal integrated circuits. Ensure the accuracy and reliability of analog designs through rigorous verification and testing. Collaborate with cross-functional teams to deliver innovative solutions that meet market demands. Contribute to the continuous improvement of design methodologies and processes. Support the development of cutting-edge technologies that enhance our products and services. Drive innovation and excellence in analog design at Synopsys. What You ll Need: Bachelor s degree in electrical engineering, Computer Engineering, or a related field. 4+ years of experience in analog circuit design and analysis. Deep understanding of analog circuits design and analysis techniques. Experience in modeling complex/non-linear circuit behavior to linear models for stability and jitter analysis. Good understanding of network/transmission line/SI analysis and semiconductor devices/physics. Strong grip on design reliability analysis. Ability to micro-architect circuits from specifications. Focus on enhancing PPA targets and reducing turnaround time.

* Diagnose problem, understand customer requirements and propose new enhancements for product improvement. * Support Benchmarking/customer engagements * Perform internal testing along release cycles * Prepare usage specification for new projects * Prepare and Deliver Product training/presentation/demos Qualifications and Experience * 5+ year Transistor level circuit simulation or support experience. * Experience in Standard Cell design, IO Cell design or Custom Cell design. * Experience in Std Cell/IO Cell/Custom Cell characterization * Solid understanding of SPICE simulation with industry-standard simulators * Knowledge of simulation environment integration is desirable. * Excellent communication and presentation skills, problem solving, and project management skills as well as ability to interface with customers and developers are essential. * Education: BSEE or equivalent with 5+ years (or MS/Ph.D. with 3+ years) of relevant experience

You will contribute to the continued development of our graphical user interface that helps our customers set up calculations using density functional theory , semi- emperical models or force field potentials . The tasks require extensive experience with scientific computing, simulations of quantum systems and a proven interest in UI development. We are looking for a talented individual with : Personal experience with quantum codes Strong general background in solid state physics or chemistry General programming skills, in particular Python and C++ Proven interest in layout ing , visual design and UI programming Excellent written and oral communication skills in English The successful applicant Is an outstanding individual with strong competences in programming or atomic-scale modelling Has a broad set of skills and is ready to apply them to whatever task assigned Is dedicated with focus on getting the job done without sacrificing quality Has 6+ years of experience in related field Is a team player Enjoys communicating and helping other people Has a positive mindset and is motivated by challenging projects Is self-motivated and takes responsibility and initiative Synopsys offers you A challenging and dynamic work environment A role in cutting-edge technology development Highly competent and motivated team members To be part of a company with a strong growth and a high potential To see a direct impact of your work