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5.0 - 9.0 years
0 Lacs
karnataka
On-site
Role Overview: As a Senior Manager Silicon Design Engineer at AMD, you will be responsible for working on the verification of complex Analog Mixed Signal PHY IPs with significant Digital and Analog content integrated into various AMD SoCs. Your main focus will be on creating feature test plans, developing verification testbenches, ensuring quality deliverables through regressions, and providing feedback to design/architecture teams. Key Responsibilities: - Verification of IP features: Create feature test plans, conduct verification of the IP in RTL, Gatesim, and Analog Mixed Signal simulations. - Develop methodology-based (UVM) verification testbenches and components from scratch for various...
Posted 1 month ago
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