12 Amd Jobs

Looking for Platform/Board Design Engineers with the following requirements and this is an immediate requirement. Extensive experience in hardware board design. Strong foundation and expertise in analyzing digital, Analog and power electronic circuits. Proficient with AMD FPGAs, CPLD and MPSOC architecture-based board designs. Knowledgeable in signal integrity, EMI/EMC concepts for digital and power electronics. Completed at least one project from high-level design to final product level validation. Capable of independently handling schematic Capturing, design analysis DC Drop, Singal Integrity, and coordinating reviews with peer of layout, mechanical, SI, and EMC teams. Experienced in board bring-up, issue investigation, and triage in collaboration with firmware and software teams. Skilled in preparing hardware design documentation, validation test planning, identify necessary test equipment, test development, execution, debugging, and report preparation. Effective communication and interpersonal skills for collaborative work with cross-functional teams, including post-silicon bench validation, BIOS, and driver development/QA. Experience with server platforms and ATX-based complex HDI board designs s is a plus. Hands-on experience with Cadence Allegro/Altium EDA tools is essential. Familiarity with programming and scripting languages like Python and Perl, and experience in test automation is advantageous. Education Requirements: B. Tech/B.E./M. Tech/M.E. Shift: 9:30 AM to 6:30 PM Work Mode: Office (Monday to Friday) Role: Hardware Architect Industry Type: Electronic Components / Semiconductors Department: Engineering - Hardware & Networks Employment Type: Full Time, Permanent Role Category: Hardware Education UG: B.Tech/B.E. in Any Specialization PG: Any Postgraduate

As an Electrical Engineer in the field of VLSI (Silicon engineering), you should hold a Bachelors or Masters degree in Electrical Engineering or a related field (BE/BTech/M.E/M.Tech). Your communication skills, both verbal and written, should be excellent. With a minimum of 8 years of experience in functional Design Verification (DV), you are expected to have proficiency in low-power UPF-based verification and possess strong debugging skills. Your skills should include an in-depth understanding of power gating and power management techniques, along with familiarity with AXI and SMN protocols. Previous experience with AMD is considered advantageous. This full-time position is open in Bangalore (BLR) or Hyderabad (HYD), India. If you meet the qualifications and experience required for this role, please submit a detailed resume showcasing your relevant experience and skills.,

We are looking for a highly skilled HPC/GPU Operations Engineer with 6-10 years of experience to oversee the management, optimization, and maintenance of high-performance computing (HPC) infrastructure, specifically focusing on GPU-accelerated workloads. Your primary responsibilities will include ensuring the reliability, efficiency, and scalability of HPC systems used for scientific computing, AI/ML, and data-intensive applications. As an IC3 level professional, you will be tasked with the following responsibilities: - Managing and administering HPC clusters, GPU nodes, and high-speed interconnects. - Configuring GPU-accelerated workloads for AI/ML, scientific computing, and simulations. - Monitoring system performance, troubleshooting issues, and optimizing resource utilization. - Installing, configuring, and maintaining HPC-related software, libraries, and tools such as CUDA, OpenMP, and MPI. - Supporting containerized workflows using technologies like Docker and Singularity. - Ensuring software compatibility with GPU architectures from NVIDIA, AMD, and Intel. - Tuning GPU and CPU performance for specific workloads, including benchmarking and profiling. - Utilizing monitoring tools like Prometheus, Grafana, and Slurm to track system health and efficiency. - Optimizing scheduling and resource allocation in workload managers such as Slurm, PBS, and LSF. - Upholding system security and access control for HPC resources. - Applying software patches, firmware updates, and security best practices. - Assisting in regulatory compliance for HPC environments. - Providing support to researchers, data scientists, and engineers using HPC resources. - Developing and maintaining documentation on best practices, troubleshooting, and system usage. - Conducting training sessions or workshops on HPC/GPU computing. To qualify for this role, you should possess the following technical skills: - Experience in managing HPC clusters and GPU-based computing environments. - Proficiency in Linux system administration, scripting (Bash, Python), and automation (Ansible, Terraform). - Knowledge of parallel computing, GPU programming (CUDA, OpenCL), and HPC frameworks. - Familiarity with networking technologies such as Infiniband and RDMA, storage solutions like Lustre, GPFS, NFS, and virtualization. At Oracle, we are dedicated to leveraging cutting-edge technology to address current challenges while fostering an inclusive work environment that encourages innovation and collaboration. We offer a range of competitive benefits, flexible medical, life insurance, and retirement options, and support employee engagement in volunteer programs. We are committed to providing accessibility assistance or accommodation for individuals with disabilities throughout the employment process. If you require such assistance, please contact us via email at accommodation-request_mb@oracle.com or by phone at +1 888 404 2494 in the United States.,

You will be joining as a Senior FPGA Engineer professional at our Bangalore location with a minimum of 5 years of experience. In this role, your primary responsibilities will include collaborating with a team of product managers, developers, and testers to define feature requirements, developing feature specifications, and implementing detailed designs using Verilog and FPGA design tools. You will also be involved in problem isolation, fault finding in embedded systems, customer issue replication, and creating/updating release notes. Additionally, you will work closely with onsite and offsite development teams to deliver market-leading products globally and mentor junior engineers in development, code, and debugging. To excel in this role, you must be an expert Verilog/System Verilog developer with strong embedded debugging skills. Proficiency in AMD/Xilinx FPGA with Vivado/Vitis tool-chains for implementations and validation, as well as experience with Xilinx/AMD simulator/ModelSim for unit and system-level simulations, is essential. You should possess excellent analytical skills, adaptability to ambiguity and change, and a thorough understanding of the FPGA development cycle within project-based environments. Experience with modern 32-bit processors/microcontrollers like ARM, debuggers, protocol analyzers, and logic analyzers is required. Desirable skills include expertise in Embedded Linux Kernel and Device Drivers development, familiarity with video and audio codecs such as MPEG4 and JPEG, knowledge of USB protocols, and understanding of network protocol stack concepts like ethernet, IP, and TCP. Strong communication and documentation skills are necessary for this role. If you are interested in this opportunity, please share the following details along with your profile to vijitha.k@blackbox.com: - Total experience: - Relevant experience in FPGA: - Experience in Embedded: - Experience in Linux: - Current CTC: - Expected CTC: - Notice period: - Current Location: - Preferred Location: - Current Company: - Any pending offers: - Educational Qualifications,

We are seeking an exceptional JavaScript developer with a strong command of AngularJS and Backbone.js. Your main responsibility will involve structuring the front-end of our web applications using Backbone.js, crafting modules and libraries, and bridging the gap between visual elements and server-side infrastructure. Your responsibilities will include developing new user-facing features, creating structured and reusable code, ensuring technical feasibility of UI/UX designs, optimizing applications for speed and scalability, and collaborating with team members and stakeholders. The ideal candidate should possess a solid understanding of JavaScript, Backbone.js, models, collections, views, web markup (HTML5, CSS3), REST API concepts, input validation techniques, browser rendering behavior, AJAX, cross-browser compatibility, JavaScript module loaders (e.g., Require.js, AMD), front-end build tools (e.g., Grunt, Gulp.js), and code versioning tools (e.g., Git, Mercurial, SVN). If you meet these qualifications and are interested in this position, please send your profile/resume to us-jobs@lumiumdesign.com.,

Key Responsibilities: Design of IP and subsystems with integration of AMD and other 3rd party IPs Perform quality checks (lint, CDC, and power rule checks) of power-gated digital designs Work collaboratively with other members of the IP team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC Work in partnership with SOC teams to support the IP at SOC level, including connectivity, DFT, verification, physical design, firmware, and post-silicon bring-up Lead a subsystem development team of 4 to 5 members. Preferred Experience: 5-7 years full-time experience in IP hardware design Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs Verilog lint tools (Spyglass) and verilog simulation tools (VCS) Clock domain crossing (CDC) tools Detailed understanding of SoC design flows Understanding of IP/SS/SoC Power Management(PM) techniques Power Gating, Clock Gating Experience with embedded processors and data fabric architectures (NoC) Outstanding interaction skills while communicating both written and verbally Ability to work with multi-level functional teams across various geographies Outstanding problem-solving and analytical skills ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering

You will be a member of the FPGA development team designing and developing complex FPGAs for use in state-of-the-art embedded systems. As an FPGA Senior Design Engineer / Module Lead, you will be involved in requirements gathering, architecture and detailed design of FPGAs, coding, code walk, development of verification and validation plans, documentation of design, verification / validation, user guides, etc., technical reviews, maintaining Quality standards as per the Project Quality Guidelines and mentoring team members. Experience in architecture design, development and verification of complex FPGAs is crucial for this role. You should possess excellent RTL coding skills in Verilog/VHDL and be familiar with AMD (Xilinx) / Intel (Altera) / Lattice / Microchip FPGAs. Additionally, familiarity with AMD (Xilinx) ISE, Vivado / Intel (Altera) Quartus / Lattice Diamond / Microchip Libero FPGA tools is required. Experience in Functional verification using ModelSim and familiarity with high-speed interfaces such as PCIe, SPI-4.2, SFI-4.2, Gigabit Ethernet, UTOPIA, POS PHY, USB2/3, DDR3, SPI, UART, I2C, Aurora etc. is necessary. Exposure to FPGA Static Timing Analysis and knowledge of scripting languages like TCL and Python are desired skills. You should also have knowledge of Interfacing FPGA to ADC, DACs and experience in FPGA on-chip debugging with Chipscope/ Signaltap. Test bench development in VHDL / Verilog / System Verilog and familiarity with hardware test equipment like High-Speed DSO, Logic Analyzer, Spectrum Analyzer, Network Analyzers, Traffic Generators, etc. are important aspects of this role. Understanding of high-speed Microprocessors / Micro-controllers, L2/L3 switching, TCP/IP, and other networking protocols is beneficial. Knowledge of Hardware Schematics, Quality Process, and Configuration Management tools is also required for this position. Good oral and written communication skills, strong organizational, presentation, and motivational skills are essential qualities. The ideal candidate should have 3 to 5 years of experience in FPGA Development and hold a BE / B.Tech / M.Tech degree in Electronics & Communication Engineering.,

Regional lead for AI Infrastructure Sales focused across industries and segments. Global role based in territory with international travel required. Be an integral part of the AI revolution. Oracle is experiencing unprecedented growth through delivering market-leading AI Infrastructure we are looking for exceptional individuals to join our team as we continue to scale the business. Qualifications 5+ years of Sales or relevant experience, preferably with 1-2 years in the AI Infrastructure space. Track record of selling complex solutions and an understanding of infrastructure deployments including lead times, margin analysis, and market demand. Technical depth is strongly preferred. Understanding of the Partner Ecosystem including but not limited to NVIDIA, AMD, Dell, Lenovo, Supermicro, Deloitte, Accenture, etc. Proven success selling to the in-region markets and creating a new business from the ground up. Strong experience in pipeline generation, deal management, closing, and working across departments. Knowledge of the local AI Community and government space and a desire to build a new AI ecosystem with OCI at the center. Employer Description As a world leader in cloud solutions, Oracle uses tomorrow's technology to tackle today's challenges. We've partnered with industry-leaders in almost every sector-and continue to thrive after 40+ years of change by operating with integrity. Primary job duty is to sell AI cloud infrastructure and related services in the region across multiple verticals, segments, and government entities. Identifies, qualifies, and closes new opportunities. Manages accounts through the entire sales process from business development prospecting and specifications through contract negotiations, signing, and post-sales support. Leverages the Oracle sales model to maximize revenue growth and increase local market share. Career Level - IC4

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: Cores PD Location : Bangalore Work Type: Onsite Job Type: Full time Job Description: Good understanding of physical design and familiar with RTL2GDS flow. Ability to close tiles/blocks from RTL2GDS including timing, noise, power, IR, phyV, conformal equivalence and all signoff checks. Familiarity with advanced technology nodes(7nm and below) and related issues. Synopsys tool suite experience a must. High frequency(>2Ghz) design experience a plus AMD experience is a big plus and highly preferred. TekWissen Group is an equal opportunity employer supporting workforce diversity.

-Design, develop & debug embedded software for ARM, Intel & NVIDIA platforms -Develop & maintain DMA drivers & user-space application software for Linux & Windows -Develop real-time applications using RTOS & manage multi-threaded, pre-emptive systems Required Candidate profile Implement communication protocol (SPI, I2C, UART, TCP/IP / UDP) Create robust, maintainable C/C++ code Support system integration, bring-up activities Experience in MPSoCs & ARM Cortex-A/R/M processor

Exp. in ARD/AMD of minimum -1 to 5 years Exp. in pharmaceutical formulation of Tablet and capsules Exp. in semi-regulated - ROW

Exp. in ARD/AMD of minimum -7 to 10 years Exp. in pharmaceutical formulation of Tablet and capsules Exp. in regulated market-EU & US Validation,Development,Scientist Required Candidate profile Job Opening at Taloja(Panvel)Location-ARD(Regulated market) send resume to sunil@flamingopharma.com Current CTC & In Hand:- Expected CTC & In Hand:- Notice Period:-